Lines Matching refs:ImplicitOp
1139 bool &isKill, MachineOperand &ImplicitOp, in classifyLEAReg() argument
1166 ImplicitOp = Src; in classifyLEAReg()
1167 ImplicitOp.setImplicit(); in classifyLEAReg()
1447 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1449 ImplicitOp, LV, LIS)) in convertToThreeAddress()
1459 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1460 MIB.add(ImplicitOp); in convertToThreeAddress()
1485 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1487 ImplicitOp, LV, LIS)) in convertToThreeAddress()
1493 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1494 MIB.add(ImplicitOp); in convertToThreeAddress()
1511 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1513 ImplicitOp, LV, LIS)) in convertToThreeAddress()
1519 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1520 MIB.add(ImplicitOp); in convertToThreeAddress()
1555 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1563 ImplicitOp, LV, LIS)) in convertToThreeAddress()
1568 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1569 MIB.add(ImplicitOp); in convertToThreeAddress()
1605 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1607 ImplicitOp, LV, LIS)) in convertToThreeAddress()
1613 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1614 MIB.add(ImplicitOp); in convertToThreeAddress()
1645 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1647 ImplicitOp, LV, LIS)) in convertToThreeAddress()
1653 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1654 MIB.add(ImplicitOp); in convertToThreeAddress()