Lines Matching refs:Outs
661 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { in CanLowerReturn() argument
664 return CCInfo.CheckReturn(Outs, RetCC_X86); in CanLowerReturn()
737 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
750 if (CallConv == CallingConv::X86_INTR && !Outs.empty()) in LowerReturn()
755 CCInfo.AnalyzeReturn(Outs, RetCC_X86); in LowerReturn()
1982 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
1998 bool IsCalleePopSRet = !IsGuaranteeTCO && hasCalleePopSRet(Outs, Subtarget); in LowerCall()
2028 Callee, CallConv, IsCalleePopSRet, isVarArg, CLI.RetTy, Outs, OutVals, in LowerCall()
2055 CCInfo.AnalyzeArguments(Outs, CC_X86); in LowerCall()
2060 CCInfo.AnalyzeArgumentsSecondPass(Outs, CC_X86); in LowerCall()
2093 if (!Outs.empty() && Outs.back().Flags.isInAlloca()) { in LowerCall()
2142 assert(OutIndex < Outs.size() && "Invalid Out index"); in LowerCall()
2144 ISD::ArgFlagsTy Flags = Outs[OutIndex].Flags; in LowerCall()
2336 ISD::ArgFlagsTy Flags = Outs[OutsIndex].Flags; in LowerCall()
2706 bool isVarArg, Type *RetTy, const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization() argument
2766 if (isVarArg && !Outs.empty()) { in IsEligibleForTailCallOptimization()
2774 CCInfo.AnalyzeCallOperands(Outs, CC_X86); in IsEligibleForTailCallOptimization()
2817 if (!Outs.empty()) { in IsEligibleForTailCallOptimization()
2827 CCInfo.AnalyzeCallOperands(Outs, CC_X86); in IsEligibleForTailCallOptimization()
2839 ISD::ArgFlagsTy Flags = Outs[I].Flags; in IsEligibleForTailCallOptimization()