Lines Matching refs:CallConv

660     CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg,  in CanLowerReturn()  argument
663 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, Context); in CanLowerReturn()
735 X86TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, in LowerReturn() argument
747 shouldDisableRetRegFromCSR(CallConv) || in LowerReturn()
750 if (CallConv == CallingConv::X86_INTR && !Outs.empty()) in LowerReturn()
754 CCState CCInfo(CallConv, isVarArg, MF, RVLocs, *DAG.getContext()); in LowerReturn()
914 CallConv != CallingConv::PreserveAll && in LowerReturn()
915 CallConv != CallingConv::PreserveMost) in LowerReturn()
938 if (CallConv == CallingConv::X86_INTR) in LowerReturn()
1094 SDValue Chain, SDValue InGlue, CallingConv::ID CallConv, bool isVarArg, in LowerCallResult() argument
1102 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs, in LowerCallResult()
1292 X86TargetLowering::LowerMemArgument(SDValue Chain, CallingConv::ID CallConv, in LowerMemArgument() argument
1300 CallConv, DAG.getTarget().Options.GuaranteedTailCallOpt); in LowerMemArgument()
1410 static ArrayRef<MCPhysReg> get64BitArgumentGPRs(CallingConv::ID CallConv, in get64BitArgumentGPRs() argument
1414 if (Subtarget.isCallingConvWin64(CallConv)) { in get64BitArgumentGPRs()
1429 CallingConv::ID CallConv, in get64BitArgumentXMMs() argument
1432 if (Subtarget.isCallingConvWin64(CallConv)) { in get64BitArgumentXMMs()
1468 CallingConv::ID CallConv, CCState &CCInfo) in VarArgsLoweringHelper() argument
1474 TargLowering(DAG.getTargetLoweringInfo()), CallConv(CallConv), in VarArgsLoweringHelper()
1486 bool isWin64() const { return Subtarget.isCallingConvWin64(CallConv); } in isWin64()
1497 CallingConv::ID CallConv; member in __anonf8175b470211::VarArgsLoweringHelper
1507 if (is64Bit() || (CallConv != CallingConv::X86_FastCall && in createVarArgAreaAndStoreRegisters()
1508 CallConv != CallingConv::X86_ThisCall)) { in createVarArgAreaAndStoreRegisters()
1517 ArrayRef<MCPhysReg> ArgGPRs = get64BitArgumentGPRs(CallConv, Subtarget); in createVarArgAreaAndStoreRegisters()
1519 get64BitArgumentXMMs(TheMachineFunction, CallConv, Subtarget); in createVarArgAreaAndStoreRegisters()
1619 (is64Bit() || (CallConv == CallingConv::X86_VectorCall || in forwardMustTailParameters()
1620 CallConv == CallingConv::Intel_OCL_BI))) in forwardMustTailParameters()
1670 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, in LowerFormalArguments() argument
1683 bool IsWin64 = Subtarget.isCallingConvWin64(CallConv); in LowerFormalArguments()
1686 !(IsVarArg && canGuaranteeTCO(CallConv)) && in LowerFormalArguments()
1691 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
1701 if (CallingConv::X86_VectorCall == CallConv) { in LowerFormalArguments()
1800 LowerMemArgument(Chain, CallConv, Ins, dl, DAG, VA, MFI, InsIndex); in LowerFormalArguments()
1830 if (CallConv == CallingConv::Swift || CallConv == CallingConv::SwiftTail) in LowerFormalArguments()
1852 if (shouldGuaranteeTCO(CallConv, in LowerFormalArguments()
1857 VarArgsLoweringHelper(FuncInfo, dl, DAG, Subtarget, CallConv, CCInfo) in LowerFormalArguments()
1861 if (X86::isCalleePop(CallConv, Is64Bit, IsVarArg, in LowerFormalArguments()
1864 } else if (CallConv == CallingConv::X86_INTR && Ins.size() == 2) { in LowerFormalArguments()
1871 if (!canGuaranteeTCO(CallConv) && hasCalleePopSRet(Ins, Subtarget)) in LowerFormalArguments()
1899 if (shouldDisableArgRegFromCSR(CallConv) || in LowerFormalArguments()
1987 CallingConv::ID CallConv = CLI.CallConv; in LowerCall() local
1994 bool IsWin64 = Subtarget.isCallingConvWin64(CallConv); in LowerCall()
1997 CallConv == CallingConv::Tail || CallConv == CallingConv::SwiftTail; in LowerCall()
2009 if (CallConv == CallingConv::X86_INTR) in LowerCall()
2028 Callee, CallConv, IsCalleePopSRet, isVarArg, CLI.RetTy, Outs, OutVals, in LowerCall()
2044 assert(!(isVarArg && canGuaranteeTCO(CallConv)) && in LowerCall()
2049 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
2059 if (CallingConv::X86_VectorCall == CallConv) { in LowerCall()
2069 else if (IsGuaranteeTCO && canGuaranteeTCO(CallConv)) in LowerCall()
2074 shouldGuaranteeTCO(CallConv, in LowerCall()
2249 if (CallConv != CallingConv::X86_RegCall) in LowerCall()
2324 assert((CallConv == CallingConv::X86_RegCall) && in LowerCall()
2426 auto AdaptedCC = CallConv; in LowerCall()
2462 bool ShouldDisableArgRegs = shouldDisableArgRegFromCSR(CallConv) || HasNCSR; in LowerCall()
2463 if (ShouldDisableArgRegs || shouldDisableRetRegFromCSR(CallConv)) { in LowerCall()
2542 if (X86::isCalleePop(CallConv, Is64Bit, isVarArg, in LowerCall()
2545 else if (!canGuaranteeTCO(CallConv) && IsCalleePopSRet) in LowerCall()
2559 return LowerCallResult(Chain, InGlue, CallConv, isVarArg, Ins, dl, DAG, in LowerCall()