334   switch (VT.SimpleTy) {  in X86FastEmitLoad()
491   switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
663     switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
1363   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpOpcode()
1385   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpImmediateOpcode()
1556     switch (SrcVT.SimpleTy) {  in X86SelectZExt()
1724       switch (SourceVT.SimpleTy) {  in X86SelectBranch()
1923   switch (VT.SimpleTy) {  in X86SelectDivRem()
2251     switch (RetVT.SimpleTy) {  in X86FastEmitSSESelect()
2274   switch (RetVT.SimpleTy) {  in X86FastEmitPseudoSelect()
2669     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2809     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2906                 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg)  in fastLowerIntrinsicCall()
2929               TII.get(TargetOpcode::COPY), Reg[VT.SimpleTy-MVT::i8])  in fastLowerIntrinsicCall()
2931       ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2944         ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2998     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
3127     switch (ArgVT.getSimpleVT().SimpleTy) {  in fastLowerArguments()
3165     switch (VT.SimpleTy) {  in fastLowerArguments()
3731     switch (VT.SimpleTy) {  in X86MaterializeInt()
3751   switch (VT.SimpleTy) {  in X86MaterializeInt()
3788   switch (VT.SimpleTy) {  in X86MaterializeFP()
3822   Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));  in X86MaterializeFP()
3900     switch (VT.SimpleTy) {  in fastMaterializeConstant()
3963   switch (VT.SimpleTy) {  in fastMaterializeFloatZero()