1732         Register OpReg = getRegForValue(TI->getOperand(0));  in X86SelectBranch()  local
1733         if (OpReg == 0) return false;  in X86SelectBranch()
1736           .addReg(OpReg).addImm(1);  in X86SelectBranch()
1767   Register OpReg = getRegForValue(BI->getCondition());  in X86SelectBranch()  local
1768   if (OpReg == 0) return false;  in X86SelectBranch()
1771   if (MRI.getRegClass(OpReg) == &X86::VK1RegClass) {  in X86SelectBranch()
1772     unsigned KOpReg = OpReg;  in X86SelectBranch()
1773     OpReg = createResultReg(&X86::GR32RegClass);  in X86SelectBranch()
1775             TII.get(TargetOpcode::COPY), OpReg)  in X86SelectBranch()
1777     OpReg = fastEmitInst_extractsubreg(MVT::i8, OpReg, X86::sub_8bit);  in X86SelectBranch()
1780       .addReg(OpReg)  in X86SelectBranch()
1789   unsigned CReg = 0, OpReg = 0;  in X86SelectShift()  local
1795     case Instruction::LShr: OpReg = X86::SHR8rCL; break;  in X86SelectShift()
1796     case Instruction::AShr: OpReg = X86::SAR8rCL; break;  in X86SelectShift()
1797     case Instruction::Shl:  OpReg = X86::SHL8rCL; break;  in X86SelectShift()
1805     case Instruction::LShr: OpReg = X86::SHR16rCL; break;  in X86SelectShift()
1806     case Instruction::AShr: OpReg = X86::SAR16rCL; break;  in X86SelectShift()
1807     case Instruction::Shl:  OpReg = X86::SHL16rCL; break;  in X86SelectShift()
1814     case Instruction::LShr: OpReg = X86::SHR32rCL; break;  in X86SelectShift()
1815     case Instruction::AShr: OpReg = X86::SAR32rCL; break;  in X86SelectShift()
1816     case Instruction::Shl:  OpReg = X86::SHL32rCL; break;  in X86SelectShift()
1823     case Instruction::LShr: OpReg = X86::SHR64rCL; break;  in X86SelectShift()
1824     case Instruction::AShr: OpReg = X86::SAR64rCL; break;  in X86SelectShift()
1825     case Instruction::Shl:  OpReg = X86::SHL64rCL; break;  in X86SelectShift()
1851   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(OpReg), ResultReg)  in X86SelectShift()
2360       Register OpReg = getRegForValue(Opnd);  in X86SelectSelect()  local
2361       if (OpReg == 0)  in X86SelectSelect()
2367         .addReg(OpReg);  in X86SelectSelect()
2405   Register OpReg = getRegForValue(I->getOperand(0));  in X86SelectIntToFP()  local
2406   if (OpReg == 0)  in X86SelectIntToFP()
2437   Register ResultReg = fastEmitInst_rr(Opcode, RC, ImplicitDefReg, OpReg);  in X86SelectIntToFP()
2459   Register OpReg = getRegForValue(I->getOperand(0));  in X86SelectFPExtOrFPTrunc()  local
2460   if (OpReg == 0)  in X86SelectFPExtOrFPTrunc()
2479   MIB.addReg(OpReg);  in X86SelectFPExtOrFPTrunc()