Lines Matching refs:p2align
155 SIMD_I<(outs V128:$dst), (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
156 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
157 "v128.load\t$dst, ${off}(${addr})$p2align",
158 "v128.load\t$off$p2align", 0>;
160 SIMD_I<(outs V128:$dst), (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
161 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
162 "v128.load\t$dst, ${off}(${addr})$p2align",
163 "v128.load\t$off$p2align", 0>;
176 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
178 (ins P2Align:$p2align, offset32_op:$off), [],
179 "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
180 "v128.load"#size#"_splat\t$off$p2align", simdop>;
183 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
185 (ins P2Align:$p2align, offset64_op:$off), [],
186 "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
187 "v128.load"#size#"_splat\t$off$p2align", simdop>;
210 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
211 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
212 signed#"\t$dst, ${off}(${addr})$p2align",
213 signed#"\t$off$p2align", simdop>;
216 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
217 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
218 unsigned#"\t$dst, ${off}(${addr})$p2align",
219 unsigned#"\t$off$p2align", !add(simdop, 1)>;
222 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
223 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
224 signed#"\t$dst, ${off}(${addr})$p2align",
225 signed#"\t$off$p2align", simdop>;
228 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
229 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
230 unsigned#"\t$dst, ${off}(${addr})$p2align",
231 unsigned#"\t$off$p2align", !add(simdop, 1)>;
254 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
255 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
256 name#"\t$dst, ${off}(${addr})$p2align",
257 name#"\t$off$p2align", simdop>;
260 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
261 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
262 name#"\t$dst, ${off}(${addr})$p2align",
263 name#"\t$off$p2align", simdop>;
292 (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx,
294 (outs), (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx),
295 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
296 name#"\t$off$p2align, $idx", simdop>;
299 (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx,
301 (outs), (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx),
302 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
303 name#"\t$off$p2align, $idx", simdop>;
351 SIMD_I<(outs), (ins P2Align:$p2align, offset32_op:$off, I32:$addr, V128:$vec),
352 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
353 "v128.store\t${off}(${addr})$p2align, $vec",
354 "v128.store\t$off$p2align", 11>;
356 SIMD_I<(outs), (ins P2Align:$p2align, offset64_op:$off, I64:$addr, V128:$vec),
357 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
358 "v128.store\t${off}(${addr})$p2align, $vec",
359 "v128.store\t$off$p2align", 11>;
373 (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx,
375 (outs), (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx),
376 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
377 name#"\t$off$p2align, $idx", simdop>;
380 (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx,
382 (outs), (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx),
383 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
384 name#"\t$off$p2align, $idx", simdop>;