Lines Matching refs:Tmp2
2032 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareMBB() local
2044 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2049 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2060 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareMBB()
2064 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
2096 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2105 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2110 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2114 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2125 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2130 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2139 Register Tmp2 = MRI.createVirtualRegister(RC); in prepareSymbol() local
2148 BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2) in prepareSymbol()
2152 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2525 Register Tmp2 = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2536 BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2) in emitSjLjDispatchBlock()
2541 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()
2552 BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2) in emitSjLjDispatchBlock()
2556 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()