Lines Matching refs:M4
516 bits<4> M4;
520 let Inst{11-8} = M4;
533 bits<4> M4;
537 let Inst{11-8} = M4;
565 bits<4> M4;
569 let Inst{11-8} = M4;
582 bits<4> M4;
586 let Inst{11-8} = M4;
1154 bits<4> M4;
1161 let Inst{15-12} = M4;
1175 bits<4> M4;
1181 let Inst{15-12} = M4;
1221 bits<4> M4;
1229 let Inst{15-12} = M4;
1311 bits<4> M4;
1317 let Inst{23-20} = M4;
1325 // the M4 value provided as explicit operand. These are passed as m4or.
1335 bits<4> M4;
1343 let Inst{19} = !if (!eq (m4or{3}, 1), 1, M4{3});
1344 let Inst{18} = !if (!eq (m4or{2}, 1), 1, M4{2});
1345 let Inst{17} = !if (!eq (m4or{1}, 1), 1, M4{1});
1346 let Inst{16} = !if (!eq (m4or{0}, 1), 1, M4{0});
1365 bits<4> M4;
1378 let Inst{15-12} = M4;
1394 bits<4> M4;
1405 let Inst{15-12} = M4;
1540 bits<4> M4;
1547 let Inst{19-16} = M4;
1563 bits<4> M4;
1570 let Inst{23-20} = M4;
1613 bits<4> M4;
1620 let Inst{15-12} = M4;
1636 bits<4> M4;
1643 let Inst{15-12} = M4;
1658 bits<4> M4;
1665 let Inst{15-12} = M4;
2711 (ins (bdaddr12only $B2, $D2):$BD2, imm32zx4:$M4),
2712 mnemonic#"\t$V1, $V3, $BD2, $M4", []>;
2713 let M4 = 0 in
2805 let M4 = 0;
2858 imm32zx4:$M4),
2859 mnemonic#"\t$V1, $V3, $BD2, $M4", []>;
2860 let M4 = 0 in
3211 let M4 = m4;
3221 let M4 = m4;
3227 (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M4),
3228 mnemonic#"\t$V1, $V2, $M3, $M4", []> {
3240 let M3 = type, M4 = 0 in
3254 let M4 = 0, Defs = [CC] in
3322 let M4 = 0;
3437 let M4 = 0;
3472 let M4 = 0;
3496 : InstRRFd<opcode, (outs cls1:$R1), (ins cls2:$R2, imm32zx4:$M4),
3497 mnemonic#"\t$R1, $R2, $M4", []>;
3503 let M4 = 0;
3555 (ins cls3:$R3, cls2:$R2, cond4:$valid, cond4:$M4),
3556 mnemonic#"$M4\t$R1, $R2, $R3",
3558 cond4:$valid, cond4:$M4))]> {
3570 : InstRRFa<opcode, (outs cls1:$R1), (ins cls3:$R3, cls2:$R2, imm32zx4:$M4),
3571 mnemonic#"\t$R1, $R2, $R3, $M4", []>;
3581 let M4 = V.ccmask;
3817 let M4 = type;
3822 (ins imm32zx8:$I2, imm32zx8:$I3, imm32zx4:$M4),
3823 mnemonic#"\t$V1, $I2, $I3, $M4", []>;
3831 let M4 = type;
3836 (ins VR128:$V3, imm32zx16:$I2, imm32zx4:$M4),
3837 mnemonic#"\t$V1, $V3, $I2, $M4", []>;
3845 let M4 = type;
3851 (ins VR128:$V2, imm32zx12:$I3, imm32zx4:$M4, imm32zx4:$M5),
3852 mnemonic#"\t$V1, $V2, $I3, $M4, $M5", []>;
3866 let M4 = m4;
3871 (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M4, imm32zx4:$M5),
3872 mnemonic#"\t$V1, $V2, $M3, $M4, $M5", []>;
3881 let M4 = type;
3888 let M4 = type;
3893 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5),
3894 mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []>;
3911 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5),
3912 mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []> {
3924 let M4 = type in
3940 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5),
3941 mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []>;
3942 def : InstAlias<mnemonic#"\t$V1, $V2, $V3, $M4",
3944 imm32zx4:$M4, 0)>;
3954 let M4 = type;
3964 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4),
3965 mnemonic#"\t$V1, $V2, $V3, $M4", []> {
3972 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5),
3973 mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []> {
3993 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5,
3995 mnemonic#"\t$V1, $V2, $V3, $M4, $M5, $M6", []>;
4006 let M4 = 0;
4020 let M4 = type;
4025 (ins VR128:$V3, (shift12only $B2, $D2):$BD2, imm32zx4:$M4),
4026 mnemonic#"\t$V1, $V3, $BD2, $M4", []>;
4034 let M4 = 0;
4045 let M4 = type;
4050 (ins VR128:$V3, (shift12only $B2, $D2):$BD2, imm32zx4: $M4),
4051 mnemonic#"\t$R1, $V3, $BD2, $M4", []>;
4331 let M4 = 0;
4341 let M4 = 0;
4347 (ins VR64:$V1, VR64:$V2, imm32zx4:$M3, imm32zx4:$M4),
4348 mnemonic#"\t$V1, $V2, $M3, $M4", []> {
4400 let M4 = 0;
4411 let M4 = 0;
4419 let M4 = 0;
4431 let M4 = 0;
4474 : InstRRFa<opcode, (outs cls1:$R1), (ins cls2:$R2, cls3:$R3, imm32zx4:$M4),
4475 mnemonic#"\t$R1, $R2, $R3, $M4", []>;
4481 (ins cls1:$R1src, cls2:$R2, imm32zx4:$M4),
4482 mnemonic#"\t$R1, $R3, $R2, $M4", []> {
4490 (ins imm32zx4:$M3, cls2:$R2, imm32zx4:$M4),
4491 mnemonic#"\t$R1, $M3, $R2, $M4", []>;
4607 (ins cls:$R2, imm32zx8:$I3, imm32zx4:$M4),
4608 mnemonic#"\t$V1, $R2, $I3, $M4", []>;
4613 (ins tr2.op:$V2, imm32zx4:$M4, imm32zx4:$M5),
4614 mnemonic#"\t$V1, $V2, $M4, $M5",
4616 imm32zx4_timm:$M4,
4624 (ins VR128:$V2, imm32zx4:$M3, imm32zx4:$M4, imm32zx4:$M5),
4625 mnemonic#"\t$V1, $V2, $M3, $M4, $M5", []>;
4637 let M4 = type;
4664 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5),
4665 mnemonic#"\t$V1, $V2, $V3, $M4, $M5", []>;
4666 def : InstAlias<mnemonic#"\t$V1, $V2, $V3, $M4",
4668 imm32zx4:$M4, 0)>;
4674 (ins tr2.op:$V2, tr2.op:$V3, imm32zx4:$M4),
4675 mnemonic#"\t$V1, $V2, $V3, $M4",
4678 imm32zx4_timm:$M4))]> {
4692 let M4 = type;
4698 (ins VR128:$V2, VR128:$V3, imm32zx4:$M4, imm32zx4:$M5,
4700 mnemonic#"\t$V1, $V2, $V3, $M4, $M5, $M6", []>;
4779 let M4 = type;
4784 imm32zx4:$M3, imm32zx4:$M4),
4785 mnemonic#"\t$R1, $V2, $M3, $M4", []>;
4789 VR128:$V3, imm32zx4:$M4),
4790 mnemonic#"\t$V1, $V2, $V3, $M4", []>;
4795 imm32zx4:$M4),
4796 mnemonic#"\t$V1, $R3, $BD2, $M4", []> {
4915 : InstRRFa<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3, imm32zx4:$M4),
4916 mnemonic#"\t$R1, $R2, $R3, $M4", []>;
4930 : InstRRFb<opcode, (outs), (ins cls1:$R1, cls2:$R2, cls3:$R3, imm32zx4:$M4),
4931 mnemonic#"\t$R1, $R3, $R2, $M4", []>;
5212 (ins cls3:$R3, cls2:$R2, cond4:$valid, cond4:$M4),
5214 cond4:$valid, cond4:$M4))]> {