2735                                      uint64_t Mask, uint64_t CmpVal,  in getTestUnderMaskCond()  argument
2753   if (CmpVal == 0) {  in getTestUnderMaskCond()
2759   if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) {  in getTestUnderMaskCond()
2765   if (EffectivelyUnsigned && CmpVal < Low) {  in getTestUnderMaskCond()
2773   if (CmpVal == Mask) {  in getTestUnderMaskCond()
2779   if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) {  in getTestUnderMaskCond()
2785   if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) {  in getTestUnderMaskCond()
2793   if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) {  in getTestUnderMaskCond()
2799   if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) {  in getTestUnderMaskCond()
2809     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low)  in getTestUnderMaskCond()
2811     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == Low)  in getTestUnderMaskCond()
2813     if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == High)  in getTestUnderMaskCond()
2815     if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == High)  in getTestUnderMaskCond()
2852   uint64_t CmpVal = ConstOp1->getZExtValue();  in adjustForTestUnderMask()  local
2877       if (CmpVal == uint64_t(-1))  in adjustForTestUnderMask()
2879       CmpVal += 1;  in adjustForTestUnderMask()
2884     MaskVal = -(CmpVal & -CmpVal);  in adjustForTestUnderMask()
2898       ((CmpVal >> ShiftVal) << ShiftVal) == CmpVal &&  in adjustForTestUnderMask()
2901                                         CmpVal >> ShiftVal,  in adjustForTestUnderMask()
2909              ((CmpVal << ShiftVal) >> ShiftVal) == CmpVal &&  in adjustForTestUnderMask()
2912                                                CmpVal << ShiftVal,  in adjustForTestUnderMask()
2917     NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal,  in adjustForTestUnderMask()
4669   SDValue CmpVal = Node->getOperand(2);  in lowerATOMIC_CMP_SWAP()  local
4687     SDValue Ops[] = { ChainIn, Addr, CmpVal, SwapVal };  in lowerATOMIC_CMP_SWAP()
4708   SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift,  in lowerATOMIC_CMP_SWAP()
8594   Register CmpVal = MI.getOperand(3).getReg();  in emitAtomicCmpSwapW()  local
8662     .addReg(Dest).addReg(CmpVal);  in emitAtomicCmpSwapW()