Lines Matching refs:LowGPR
185 unsigned LowGPR = 0; in assignCalleeSavedSpillSlots() local
193 LowGPR = Reg; in assignCalleeSavedSpillSlots()
205 ZFI->setRestoreGPRRegs(LowGPR, HighGPR, StartSPOffset); in assignCalleeSavedSpillSlots()
215 LowGPR = Reg; StartSPOffset = Offset; in assignCalleeSavedSpillSlots()
219 ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset); in assignCalleeSavedSpillSlots()
340 if (SpillGPRs.LowGPR) { in spillCalleeSavedRegisters()
341 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR && in spillCalleeSavedRegisters()
348 addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false); in spillCalleeSavedRegisters()
412 if (RestoreGPRs.LowGPR) { in restoreCalleeSavedRegisters()
416 assert(RestoreGPRs.LowGPR != RestoreGPRs.HighGPR && in restoreCalleeSavedRegisters()
423 MIB.addReg(RestoreGPRs.LowGPR, RegState::Define); in restoreCalleeSavedRegisters()
433 if (Reg != RestoreGPRs.LowGPR && Reg != RestoreGPRs.HighGPR && in restoreCalleeSavedRegisters()
480 ZFI->getRestoreGPRRegs().LowGPR != SystemZ::R6D) in processFunctionBeforeFrameFinalized()
577 if (ZFI->getSpillGPRRegs().LowGPR) { in emitPrologue()
718 if (ZFI->getRestoreGPRRegs().LowGPR) { in emitEpilogue()
1092 if (SpillGPRs.LowGPR) { in spillCalleeSavedRegisters()
1093 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR && in spillCalleeSavedRegisters()
1100 addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false); in spillCalleeSavedRegisters()
1167 if (RestoreGPRs.LowGPR) { in restoreCalleeSavedRegisters()
1169 if (RestoreGPRs.LowGPR == RestoreGPRs.HighGPR) in restoreCalleeSavedRegisters()
1171 BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LG), RestoreGPRs.LowGPR) in restoreCalleeSavedRegisters()
1180 MIB.addReg(RestoreGPRs.LowGPR, RegState::Define); in restoreCalleeSavedRegisters()
1190 if (Reg > RestoreGPRs.LowGPR && Reg < RestoreGPRs.HighGPR) in restoreCalleeSavedRegisters()
1220 if (ZFI->getSpillGPRRegs().LowGPR) { in emitPrologue()
1329 if (ZFI->getRestoreGPRRegs().LowGPR != SPReg) { in emitEpilogue()