Lines Matching refs:addReg

42       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))  in lowerRILow()
46 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in lowerRILow()
47 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg())) in lowerRILow()
56 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in lowerRIHigh()
60 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in lowerRIHigh()
61 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg())) in lowerRIHigh()
69 .addReg(MI->getOperand(0).getReg()) in lowerRIEfLow()
70 .addReg(MI->getOperand(1).getReg()) in lowerRIEfLow()
71 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg())) in lowerRIEfLow()
122 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in lowerSubvectorLoad()
123 .addReg(MI->getOperand(1).getReg()) in lowerSubvectorLoad()
125 .addReg(MI->getOperand(3).getReg()); in lowerSubvectorLoad()
132 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in lowerSubvectorStore()
133 .addReg(MI->getOperand(1).getReg()) in lowerSubvectorStore()
135 .addReg(MI->getOperand(3).getReg()) in lowerSubvectorStore()
148 .addReg(SystemZMC::GR64Regs[static_cast<unsigned>(CT)])); in emitCallInformation()
204 .addReg(SystemZ::R14D); in emitInstruction()
209 .addReg(SystemZ::R7D) in emitInstruction()
211 .addReg(0); in emitInstruction()
218 .addReg(SystemZ::R14D); in emitInstruction()
225 .addReg(SystemZ::R7D) in emitInstruction()
227 .addReg(0); in emitInstruction()
232 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
233 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
235 .addReg(SystemZ::R14D) in emitInstruction()
241 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
242 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
244 .addReg(SystemZ::R14D) in emitInstruction()
250 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
253 .addReg(SystemZ::R14D) in emitInstruction()
259 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
262 .addReg(SystemZ::R14D) in emitInstruction()
268 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
269 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
271 .addReg(SystemZ::R14D) in emitInstruction()
277 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
278 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
280 .addReg(SystemZ::R14D) in emitInstruction()
286 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
289 .addReg(SystemZ::R14D) in emitInstruction()
295 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
298 .addReg(SystemZ::R14D) in emitInstruction()
305 .addReg(SystemZ::R7D) in emitInstruction()
313 .addReg(SystemZ::R7D) in emitInstruction()
314 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
320 .addReg(SystemZ::R3D) in emitInstruction()
321 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
346 MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp)); in emitInstruction()
350 MCInstBuilder(SystemZ::ALGFI).addReg(TargetReg).addImm(Disp)); in emitInstruction()
355 .addReg(TargetReg) in emitInstruction()
356 .addReg(ADAReg) in emitInstruction()
358 .addReg(IndexReg)); in emitInstruction()
364 .addReg(SystemZ::R14D) in emitInstruction()
370 .addReg(SystemZ::R14D) in emitInstruction()
371 .addReg(MI->getOperand(0).getReg()); in emitInstruction()
388 .addReg(MI->getOperand(0).getReg()); in emitInstruction()
395 .addReg(MI->getOperand(2).getReg()); in emitInstruction()
400 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
401 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
403 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
409 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
410 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
412 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
418 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
421 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
427 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
430 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
436 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
437 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
439 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
445 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
446 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
448 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
454 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
457 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
463 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
466 .addReg(MI->getOperand(3).getReg()) in emitInstruction()
472 .addReg(SystemZ::R14D) in emitInstruction()
479 .addReg(SystemZ::R14D) in emitInstruction()
486 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
492 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg())) in emitInstruction()
498 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg())) in emitInstruction()
514 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
515 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg())) in emitInstruction()
516 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg())); in emitInstruction()
522 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
523 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg())); in emitInstruction()
564 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg())) in emitInstruction()
565 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg())) in emitInstruction()
566 .addReg(0).addImm(0); in emitInstruction()
571 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
572 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg())) in emitInstruction()
573 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
574 .addReg(0).addImm(0); in emitInstruction()
614 .addImm(14).addReg(SystemZ::R0D); in emitInstruction()
617 .addImm(15).addReg(SystemZ::R0D); in emitInstruction()
672 MCInst ET = MCInstBuilder(TargetInsOpc).addReg(DestReg) in emitInstruction()
673 .addImm(DestDisp).addImm(1).addReg(SrcReg).addImm(SrcDisp); in emitInstruction()
684 MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot)); in emitInstruction()
705 MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI); in EmitNop()
710 MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0), in EmitNop()
746 MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op), in LowerFENTRY_CALL()
810 .addReg(ScratchReg) in LowerPATCHPOINT()
815 .addReg(ScratchReg) in LowerPATCHPOINT()
821 .addReg(SystemZ::R14D) in LowerPATCHPOINT()
822 .addReg(ScratchReg)); in LowerPATCHPOINT()
828 .addReg(SystemZ::R14D) in LowerPATCHPOINT()