57           GR->add(GV, &MF, MI.getOperand(2).getReg());  in addConstantsToTrack()
64             auto *BuildVec = MRI.getVRegDef(MI.getOperand(2).getReg());  in addConstantsToTrack()
69                       BuildVec->getOperand(1 + i).getReg());  in addConstantsToTrack()
71           GR->add(Const, &MF, MI.getOperand(2).getReg());  in addConstantsToTrack()
77           MachineInstr *SrcMI = MRI.getVRegDef(MI.getOperand(2).getReg());  in addConstantsToTrack()
85     Register Reg = MI->getOperand(2).getReg();  in addConstantsToTrack()
88     auto *RC = MRI.getRegClassOrNull(MI->getOperand(0).getReg());  in addConstantsToTrack()
91     MRI.replaceRegWith(MI->getOperand(0).getReg(), Reg);  in addConstantsToTrack()
109         MachineInstr *ConstMI = MRI.getVRegDef(MOp.getReg());  in foldConstantsIntoIntrinsics()
114         if (MRI.use_empty(ConstMI->getOperand(0).getReg()))  in foldConstantsIntoIntrinsics()
135         MIB.buildBitcast(MI.getOperand(0).getReg(), MI.getOperand(2).getReg());  in insertBitcasts()
138       Register Def = MI.getOperand(0).getReg();  in insertBitcasts()
139       Register Source = MI.getOperand(2).getReg();  in insertBitcasts()
174     Register Reg = MI->getOperand(0).getReg();  in propagateSPIRVType()
195         MachineInstr *Def = Op.isReg() ? MRI.getVRegDef(Op.getReg()) : nullptr;  in propagateSPIRVType()
266         Register Reg = MI.getOperand(1).getReg();  in generateAssignInstrs()
279         Register Reg = MI.getOperand(1).getReg();  in generateAssignInstrs()
295         Register Reg = MI.getOperand(0).getReg();  in generateAssignInstrs()
310           MachineInstr *ElemMI = MRI.getVRegDef(MI.getOperand(1).getReg());  in generateAssignInstrs()
350       GR.getSPIRVTypeForVReg(SpvType->getOperand(1).getReg())->getOpcode() ==  in createNewIdReg()
372   assert(MI.getNumDefs() > 0 && MRI.hasOneUse(MI.getOperand(0).getReg()));  in processInstr()
374       *(MRI.use_instr_begin(MI.getOperand(0).getReg()));  in processInstr()
375   auto NewReg = createNewIdReg(MI.getOperand(0).getReg(), Opc, MRI, *GR).first;  in processInstr()
384     auto IdOpInfo = createNewIdReg(Op.getReg(), Opc, MRI, *GR);  in processInstr()
385     MIB.buildInstr(IdOpInfo.second).addDef(IdOpInfo.first).addUse(Op.getReg());  in processInstr()
410       Register SrcReg = MI.getOperand(1).getReg();  in processInstrsWithTypeFolding()
414       Register DstReg = MI.getOperand(0).getReg();  in processInstrsWithTypeFolding()
478         CompareRegs.insert(MI.getOperand(1).getReg());  in processSwitches()
485           CompareRegs.contains(MI.getOperand(1).getReg())) {  in processSwitches()
487         Register Dst = MI.getOperand(0).getReg();  in processSwitches()
494           CompareRegs.contains(MI.getOperand(2).getReg())) {  in processSwitches()
495         Register Dst = MI.getOperand(0).getReg();  in processSwitches()
523     Register CompareReg = Switch->getOperand(1).getReg();  in processSwitches()
526           (*j)->getOperand(1).getReg() == CompareReg)  in processSwitches()
530             (*j)->getOperand(2).getReg() == CompareReg))  in processSwitches()
534       Register Dst = ICMP->getOperand(0).getReg();  in processSwitches()
539       uint64_t Value = getIConstVal(ICMP->getOperand(3).getReg(), &MRI);  in processSwitches()
559            NextMBB->front().getOperand(2).getReg() != CompareReg)) {  in processSwitches()
571       Register CReg = Switch->getOperand(k).getReg();  in processSwitches()