1821                               : MachineCombinerPattern::FMSUB);  in getFPFusedMultiplyPatterns()
1862     return Pattern == MachineCombinerPattern::FMSUB ? RISCV::FMSUB_H  in getFPFusedMultiplyOpcode()
1865     return Pattern == MachineCombinerPattern::FMSUB ? RISCV::FMSUB_S  in getFPFusedMultiplyOpcode()
1868     return Pattern == MachineCombinerPattern::FMSUB ? RISCV::FMSUB_D  in getFPFusedMultiplyOpcode()
1878   case MachineCombinerPattern::FMSUB:  in getAddendOperandIdx()
1940   case MachineCombinerPattern::FMSUB: {  in genAlternativeCodeSequence()
2666   case CASE_VFMA_SPLATS(FMSUB):  in findCommutedOpIndices()
2698   case CASE_VFMA_OPCODE_LMULS_MF4(FMSUB, VV):  in findCommutedOpIndices()
2831   case CASE_VFMA_SPLATS(FMSUB):  in commuteInstructionImpl()
2856       CASE_VFMA_CHANGE_OPCODE_SPLATS(FMSAC, FMSUB)  in commuteInstructionImpl()
2857       CASE_VFMA_CHANGE_OPCODE_SPLATS(FMSUB, FMSAC)  in commuteInstructionImpl()
2863       CASE_VFMA_CHANGE_OPCODE_LMULS_MF4(FMSAC, FMSUB, VV)  in commuteInstructionImpl()
2880   case CASE_VFMA_OPCODE_LMULS_MF4(FMSUB, VV):  in commuteInstructionImpl()
2894         CASE_VFMA_CHANGE_OPCODE_LMULS_MF4(FMSUB, FMSAC, VV)  in commuteInstructionImpl()