Lines Matching refs:RISCVTargetLowering
82 RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, in RISCVTargetLowering() function in RISCVTargetLowering
1418 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType()
1429 MVT RISCVTargetLowering::getVPExplicitVectorLengthTy() const { in getVPExplicitVectorLengthTy()
1434 bool RISCVTargetLowering::shouldExpandGetVectorLength(EVT TripCountVT, in shouldExpandGetVectorLength()
1460 bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, in getTgtMemIntrinsic()
1494 Info.flags |= RISCVTargetLowering::getTargetMMOFlags(I); in getTgtMemIntrinsic()
1724 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, in isLegalAddressingMode()
1754 bool RISCVTargetLowering::isLegalICmpImmediate(int64_t Imm) const { in isLegalICmpImmediate()
1758 bool RISCVTargetLowering::isLegalAddImmediate(int64_t Imm) const { in isLegalAddImmediate()
1767 bool RISCVTargetLowering::isTruncateFree(Type *SrcTy, Type *DstTy) const { in isTruncateFree()
1775 bool RISCVTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const { in isTruncateFree()
1786 bool RISCVTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree()
1801 bool RISCVTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const { in isSExtCheaperThanZExt()
1805 bool RISCVTargetLowering::signExtendConstant(const ConstantInt *CI) const { in signExtendConstant()
1809 bool RISCVTargetLowering::isCheapToSpeculateCttz(Type *Ty) const { in isCheapToSpeculateCttz()
1813 bool RISCVTargetLowering::isCheapToSpeculateCtlz(Type *Ty) const { in isCheapToSpeculateCtlz()
1818 bool RISCVTargetLowering::isMaskAndCmp0FoldingBeneficial( in isMaskAndCmp0FoldingBeneficial()
1834 bool RISCVTargetLowering::hasAndNotCompare(SDValue Y) const { in hasAndNotCompare()
1845 bool RISCVTargetLowering::hasBitTest(SDValue X, SDValue Y) const { in hasBitTest()
1857 bool RISCVTargetLowering::shouldFoldSelectWithIdentityConstant(unsigned Opcode, in shouldFoldSelectWithIdentityConstant()
1869 bool RISCVTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm, in shouldConvertConstantLoadToIntImm()
1900 bool RISCVTargetLowering::
1924 bool RISCVTargetLowering::canSplatOperand(unsigned Opcode, int Operand) const { in canSplatOperand()
1953 bool RISCVTargetLowering::canSplatOperand(Instruction *I, int Operand) const { in canSplatOperand()
1999 bool RISCVTargetLowering::shouldSinkOperands( in shouldSinkOperands()
2038 bool RISCVTargetLowering::shouldScalarizeBinop(SDValue VecOp) const { in shouldScalarizeBinop()
2060 bool RISCVTargetLowering::isOffsetFoldingLegal( in isOffsetFoldingLegal()
2076 std::pair<int, bool> RISCVTargetLowering::getLegalZfaFPImm(const APFloat &Imm, in getLegalZfaFPImm()
2102 bool RISCVTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, in isFPImmLegal()
2140 bool RISCVTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
2172 MVT RISCVTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context, in getRegisterTypeForCallingConv()
2189 unsigned RISCVTargetLowering::getNumRegistersForCallingConv(LLVMContext &Context, in getNumRegistersForCallingConv()
2201 unsigned RISCVTargetLowering::getVectorTypeBreakdownForCallingConv( in getVectorTypeBreakdownForCallingConv()
2282 RISCVII::VLMUL RISCVTargetLowering::getLMUL(MVT VT) { in getLMUL()
2308 unsigned RISCVTargetLowering::getRegClassIDForLMUL(RISCVII::VLMUL LMul) { in getRegClassIDForLMUL()
2326 unsigned RISCVTargetLowering::getSubregIndexByMVT(MVT VT, unsigned Index) { in getSubregIndexByMVT()
2349 unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) { in getRegClassIDForVecVT()
2361 RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs( in decomposeSubvectorInsertExtractToSubRegs()
2393 bool RISCVTargetLowering::mergeStoresAfterLegalization(EVT VT) const { in mergeStoresAfterLegalization()
2398 bool RISCVTargetLowering::isLegalElementTypeForRVV(EVT ScalarTy) const { in isLegalElementTypeForRVV()
2422 unsigned RISCVTargetLowering::combineRepeatedFPDivisors() const { in combineRepeatedFPDivisors()
2506 bool RISCVTargetLowering::useRVVForFixedLengthVectorVT(MVT VT) const { in useRVVForFixedLengthVectorVT()
2551 MVT RISCVTargetLowering::getContainerForFixedLengthVector(MVT VT) const { in getContainerForFixedLengthVector()
2602 RISCVTargetLowering::computeVLMAXBounds(ContainerVT, Subtarget); in getVLOp()
2641 SDValue RISCVTargetLowering::computeVLMax(MVT VecVT, const SDLoc &DL, in computeVLMax()
2649 RISCVTargetLowering::computeVLMAXBounds(MVT VecVT, in computeVLMAXBounds()
2658 RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize); in computeVLMAXBounds()
2662 RISCVTargetLowering::computeVLMAX(VectorBitsMin, EltSize, MinSize); in computeVLMAXBounds()
2675 bool RISCVTargetLowering::shouldExpandBuildVectorWithShuffles( in shouldExpandBuildVectorWithShuffles()
2680 InstructionCost RISCVTargetLowering::getLMULCost(MVT VT) const { in getLMULCost()
2691 RISCVVType::decodeVLMUL(RISCVTargetLowering::getLMUL(VT)); in getLMULCost()
2706 InstructionCost RISCVTargetLowering::getVRGatherVVCost(MVT VT) const { in getVRGatherVVCost()
2713 InstructionCost RISCVTargetLowering::getVRGatherVICost(MVT VT) const { in getVRGatherVICost()
2721 InstructionCost RISCVTargetLowering::getVSlideVXCost(MVT VT) const { in getVSlideVXCost()
2729 InstructionCost RISCVTargetLowering::getVSlideVICost(MVT VT) const { in getVSlideVICost()
3850 switch (RISCVTargetLowering::getLMUL(ContainerVT)) { in lowerBUILD_VECTOR()
5093 bool RISCVTargetLowering::isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const { in isShuffleMaskLegal()
5116 RISCVTargetLowering::lowerCTLZ_CTTZ_ZERO_UNDEF(SDValue Op, in lowerCTLZ_CTTZ_ZERO_UNDEF()
5236 SDValue RISCVTargetLowering::expandUnalignedRVVLoad(SDValue Op, in expandUnalignedRVVLoad()
5265 SDValue RISCVTargetLowering::expandUnalignedRVVStore(SDValue Op, in expandUnalignedRVVStore()
5361 SDValue RISCVTargetLowering::LowerIS_FPCLASS(SDValue Op, in LowerIS_FPCLASS()
5835 SDValue RISCVTargetLowering::LowerOperation(SDValue Op, in LowerOperation()
6805 SDValue RISCVTargetLowering::getAddr(NodeTy *N, SelectionDAG &DAG, in getAddr()
6875 SDValue RISCVTargetLowering::lowerGlobalAddress(SDValue Op, in lowerGlobalAddress()
6883 SDValue RISCVTargetLowering::lowerBlockAddress(SDValue Op, in lowerBlockAddress()
6890 SDValue RISCVTargetLowering::lowerConstantPool(SDValue Op, in lowerConstantPool()
6897 SDValue RISCVTargetLowering::lowerJumpTable(SDValue Op, in lowerJumpTable()
6904 SDValue RISCVTargetLowering::getStaticTLSAddr(GlobalAddressSDNode *N, in getStaticTLSAddr()
6951 SDValue RISCVTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N, in getDynamicTLSAddr()
6983 SDValue RISCVTargetLowering::getTLSDescAddr(GlobalAddressSDNode *N, in getTLSDescAddr()
7000 SDValue RISCVTargetLowering::lowerGlobalTLSAddress(SDValue Op, in lowerGlobalTLSAddress()
7182 SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const { in lowerSELECT()
7336 SDValue RISCVTargetLowering::lowerBRCOND(SDValue Op, SelectionDAG &DAG) const { in lowerBRCOND()
7359 SDValue RISCVTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const { in lowerVASTART()
7374 SDValue RISCVTargetLowering::lowerFRAMEADDR(SDValue Op, in lowerFRAMEADDR()
7397 SDValue RISCVTargetLowering::lowerRETURNADDR(SDValue Op, in lowerRETURNADDR()
7427 SDValue RISCVTargetLowering::lowerShiftLeftParts(SDValue Op, in lowerShiftLeftParts()
7466 SDValue RISCVTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, in lowerShiftRightParts()
7520 SDValue RISCVTargetLowering::lowerVectorMaskSplat(SDValue Op, in lowerVectorMaskSplat()
7546 SDValue RISCVTargetLowering::lowerSPLAT_VECTOR_PARTS(SDValue Op, in lowerSPLAT_VECTOR_PARTS()
7576 SDValue RISCVTargetLowering::lowerVectorMaskExt(SDValue Op, SelectionDAG &DAG, in lowerVectorMaskExt()
7614 SDValue RISCVTargetLowering::lowerFixedLengthVectorExtendToRVV( in lowerFixedLengthVectorExtendToRVV()
7644 SDValue RISCVTargetLowering::lowerVectorMaskTruncLike(SDValue Op, in lowerVectorMaskTruncLike()
7696 SDValue RISCVTargetLowering::lowerVectorTruncLike(SDValue Op, in lowerVectorTruncLike()
7759 RISCVTargetLowering::lowerStrictFPExtendOrRoundLike(SDValue Op, in lowerStrictFPExtendOrRoundLike()
7806 RISCVTargetLowering::lowerVectorFPExtendOrRoundLike(SDValue Op, in lowerVectorFPExtendOrRoundLike()
7906 SDValue RISCVTargetLowering::lowerINSERT_VECTOR_ELT(SDValue Op, in lowerINSERT_VECTOR_ELT()
8075 SDValue RISCVTargetLowering::lowerEXTRACT_VECTOR_ELT(SDValue Op, in lowerEXTRACT_VECTOR_ELT()
8316 RISCVTargetLowering::computeVLMAXBounds(VT, Subtarget); in lowerVectorIntrinsicScalars()
8323 RISCVII::VLMUL Lmul = RISCVTargetLowering::getLMUL(I32VT); in lowerVectorIntrinsicScalars()
8338 RISCVII::VLMUL Lmul = RISCVTargetLowering::getLMUL(VT); in lowerVectorIntrinsicScalars()
8481 SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, in LowerINTRINSIC_WO_CHAIN()
8730 SDValue RISCVTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, in LowerINTRINSIC_W_CHAIN()
8894 SDValue RISCVTargetLowering::LowerINTRINSIC_VOID(SDValue Op, in LowerINTRINSIC_VOID()
9089 SDValue RISCVTargetLowering::lowerVectorMaskVecReduction(SDValue Op, in lowerVectorMaskVecReduction()
9210 SDValue RISCVTargetLowering::lowerVECREDUCE(SDValue Op, in lowerVECREDUCE()
9295 SDValue RISCVTargetLowering::lowerFPVECREDUCE(SDValue Op, in lowerFPVECREDUCE()
9317 SDValue RISCVTargetLowering::lowerVPREDUCE(SDValue Op, in lowerVPREDUCE()
9342 SDValue RISCVTargetLowering::lowerINSERT_SUBVECTOR(SDValue Op, in lowerINSERT_SUBVECTOR()
9446 RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs( in lowerINSERT_SUBVECTOR()
9449 RISCVII::VLMUL SubVecLMUL = RISCVTargetLowering::getLMUL(SubVecVT); in lowerINSERT_SUBVECTOR()
9520 SDValue RISCVTargetLowering::lowerEXTRACT_SUBVECTOR(SDValue Op, in lowerEXTRACT_SUBVECTOR()
9612 RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs( in lowerEXTRACT_SUBVECTOR()
9685 SDValue RISCVTargetLowering::lowerVECTOR_DEINTERLEAVE(SDValue Op, in lowerVECTOR_DEINTERLEAVE()
9762 SDValue RISCVTargetLowering::lowerVECTOR_INTERLEAVE(SDValue Op, in lowerVECTOR_INTERLEAVE()
9853 SDValue RISCVTargetLowering::lowerSTEP_VECTOR(SDValue Op, in lowerSTEP_VECTOR()
9883 SDValue RISCVTargetLowering::lowerVECTOR_REVERSE(SDValue Op, in lowerVECTOR_REVERSE()
9897 RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize); in lowerVECTOR_REVERSE()
9957 SDValue RISCVTargetLowering::lowerVECTOR_SPLICE(SDValue Op, in lowerVECTOR_SPLICE()
9992 RISCVTargetLowering::lowerFixedLengthVectorLoadToRVV(SDValue Op, in lowerFixedLengthVectorLoadToRVV()
10009 RISCVTargetLowering::computeVLMAXBounds(ContainerVT, Subtarget); in lowerFixedLengthVectorLoadToRVV()
10039 RISCVTargetLowering::lowerFixedLengthVectorStoreToRVV(SDValue Op, in lowerFixedLengthVectorStoreToRVV()
10070 RISCVTargetLowering::computeVLMAXBounds(ContainerVT, Subtarget); in lowerFixedLengthVectorStoreToRVV()
10088 SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op, in lowerMaskedLoad()
10153 SDValue RISCVTargetLowering::lowerMaskedStore(SDValue Op, in lowerMaskedStore()
10207 RISCVTargetLowering::lowerFixedLengthVectorSetccToRVV(SDValue Op, in lowerFixedLengthVectorSetccToRVV()
10231 SDValue RISCVTargetLowering::lowerVectorStrictFSetcc(SDValue Op, in lowerVectorStrictFSetcc()
10320 SDValue RISCVTargetLowering::lowerABS(SDValue Op, SelectionDAG &DAG) const { in lowerABS()
10357 SDValue RISCVTargetLowering::lowerFixedLengthVectorFCOPYSIGNToRVV( in lowerFixedLengthVectorFCOPYSIGNToRVV()
10378 SDValue RISCVTargetLowering::lowerFixedLengthVectorSelectToRVV( in lowerFixedLengthVectorSelectToRVV()
10402 SDValue RISCVTargetLowering::lowerToScalableOp(SDValue Op, in lowerToScalableOp()
10456 SDValue RISCVTargetLowering::lowerVPOp(SDValue Op, SelectionDAG &DAG) const { in lowerVPOp()
10511 SDValue RISCVTargetLowering::lowerVPExtMaskOp(SDValue Op, in lowerVPExtMaskOp()
10544 SDValue RISCVTargetLowering::lowerVPSetCCMaskOp(SDValue Op, in lowerVPSetCCMaskOp()
10624 SDValue RISCVTargetLowering::lowerVPFPIntConvOp(SDValue Op, in lowerVPFPIntConvOp()
10758 RISCVTargetLowering::lowerVPSpliceExperimental(SDValue Op, in lowerVPSpliceExperimental()
10839 RISCVTargetLowering::lowerVPReverseExperimental(SDValue Op, in lowerVPReverseExperimental()
10879 RISCVTargetLowering::computeVLMAX(VectorBitsMax, EltSize, MinSize); in lowerVPReverseExperimental()
10959 SDValue RISCVTargetLowering::lowerLogicVPOp(SDValue Op, in lowerLogicVPOp()
10985 SDValue RISCVTargetLowering::lowerVPStridedLoad(SDValue Op, in lowerVPStridedLoad()
11031 SDValue RISCVTargetLowering::lowerVPStridedStore(SDValue Op, in lowerVPStridedStore()
11074 SDValue RISCVTargetLowering::lowerMaskedGather(SDValue Op, in lowerMaskedGather()
11174 SDValue RISCVTargetLowering::lowerMaskedScatter(SDValue Op, in lowerMaskedScatter()
11255 SDValue RISCVTargetLowering::lowerGET_ROUNDING(SDValue Op, in lowerGET_ROUNDING()
11286 SDValue RISCVTargetLowering::lowerSET_ROUNDING(SDValue Op, in lowerSET_ROUNDING()
11318 SDValue RISCVTargetLowering::lowerEH_DWARF_CFA(SDValue Op, in lowerEH_DWARF_CFA()
11382 void RISCVTargetLowering::ReplaceNodeResults(SDNode *N, in ReplaceNodeResults()
14694 const RISCVTargetLowering &TLI) { in performBUILD_VECTORCombine()
14746 const RISCVTargetLowering &TLI) { in performINSERT_VECTOR_ELTCombine()
14819 const RISCVTargetLowering &TLI) { in performCONCAT_VECTORSCombine()
15021 RISCVTargetLowering::DAGCombinerInfo &DCI) { in legalizeScatterGatherIndexType()
15129 SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N, in PerformDAGCombine()
16095 bool RISCVTargetLowering::shouldTransformSignedTruncationCheck( in shouldTransformSignedTruncationCheck()
16114 bool RISCVTargetLowering::isDesirableToCommuteWithShift( in isDesirableToCommuteWithShift()
16166 bool RISCVTargetLowering::targetShrinkDemandedConstant( in targetShrinkDemandedConstant()
16271 void RISCVTargetLowering::computeKnownBitsForTargetNode(const SDValue Op, in computeKnownBitsForTargetNode()
16412 unsigned RISCVTargetLowering::ComputeNumSignBitsForTargetNode( in ComputeNumSignBitsForTargetNode()
16499 RISCVTargetLowering::getTargetConstantFromLoad(LoadSDNode *Ld) const { in getTargetConstantFromLoad()
17163 RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, in EmitInstrWithCustomInserter()
17254 void RISCVTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI, in AdjustInstrPostInstrSelection()
17405 CCState &State, const RISCVTargetLowering &TLI) { in allocateRVVReg()
17428 bool IsRet, Type *OrigTy, const RISCVTargetLowering &TLI, in CC_RISCV()
17677 void RISCVTargetLowering::analyzeInputArgs( in analyzeInputArgs()
17709 void RISCVTargetLowering::analyzeOutputArgs( in analyzeOutputArgs()
17771 const RISCVTargetLowering &TLI) { in unpackFromRegLoc()
17907 const RISCVTargetLowering &TLI, in CC_RISCV_FastCC()
18080 SDValue RISCVTargetLowering::LowerFormalArguments( in LowerFormalArguments()
18246 bool RISCVTargetLowering::isEligibleForTailCallOptimization( in isEligibleForTailCallOptimization()
18312 SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI, in LowerCall()
18613 bool RISCVTargetLowering::CanLowerReturn( in CanLowerReturn()
18636 RISCVTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, in LowerReturn()
18737 void RISCVTargetLowering::validateCCReservedRegs( in validateCCReservedRegs()
18752 bool RISCVTargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const { in isUsedByReturnOnly()
18789 bool RISCVTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const { in mayBeEmittedAsTailCall()
18793 const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const { in getTargetNodeName()
19025 RISCVTargetLowering::ConstraintType
19026 RISCVTargetLowering::getConstraintType(StringRef Constraint) const { in getConstraintType()
19050 RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint()
19255 RISCVTargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint()
19269 void RISCVTargetLowering::LowerAsmOperandForConstraint( in LowerAsmOperandForConstraint()
19315 Instruction *RISCVTargetLowering::emitLeadingFence(IRBuilderBase &Builder, in emitLeadingFence()
19331 Instruction *RISCVTargetLowering::emitTrailingFence(IRBuilderBase &Builder, in emitTrailingFence()
19349 RISCVTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const { in shouldExpandAtomicRMWInIR()
19419 Value *RISCVTargetLowering::emitMaskedAtomicRMWIntrinsic( in emitMaskedAtomicRMWIntrinsic()
19479 RISCVTargetLowering::shouldExpandAtomicCmpXchgInIR( in shouldExpandAtomicCmpXchgInIR()
19491 Value *RISCVTargetLowering::emitMaskedAtomicCmpXchgIntrinsic( in emitMaskedAtomicCmpXchgIntrinsic()
19513 bool RISCVTargetLowering::shouldRemoveExtendFromGSIndex(SDValue Extend, in shouldRemoveExtendFromGSIndex()
19522 bool RISCVTargetLowering::shouldConvertFpToSat(unsigned Op, EVT FPVT, in shouldConvertFpToSat()
19539 unsigned RISCVTargetLowering::getJumpTableEncoding() const { in getJumpTableEncoding()
19549 const MCExpr *RISCVTargetLowering::LowerCustomJumpTableEntry( in LowerCustomJumpTableEntry()
19557 bool RISCVTargetLowering::isVScaleKnownToBeAPowerOfTwo() const { in isVScaleKnownToBeAPowerOfTwo()
19569 bool RISCVTargetLowering::getIndexedAddressParts(SDNode *Op, SDValue &Base, in getIndexedAddressParts()
19605 bool RISCVTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, in getPreIndexedAddressParts()
19627 bool RISCVTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op, in getPostIndexedAddressParts()
19654 bool RISCVTargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, in isFMAFasterThanFMulAndFAdd()
19676 ISD::NodeType RISCVTargetLowering::getExtendForAtomicCmpSwapArg() const { in getExtendForAtomicCmpSwapArg()
19681 Register RISCVTargetLowering::getExceptionPointerRegister( in getExceptionPointerRegister()
19686 Register RISCVTargetLowering::getExceptionSelectorRegister( in getExceptionSelectorRegister()
19691 bool RISCVTargetLowering::shouldExtendTypeInLibCall(EVT Type) const { in shouldExtendTypeInLibCall()
19701 bool RISCVTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const { in shouldSignExtendTypeInLibCall()
19708 bool RISCVTargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT, in decomposeMulByConstant()
19748 bool RISCVTargetLowering::isMulAddWithConstProfitable(SDValue AddNode, in isMulAddWithConstProfitable()
19771 bool RISCVTargetLowering::allowsMisalignedMemoryAccesses( in allowsMisalignedMemoryAccesses()
19800 EVT RISCVTargetLowering::getOptimalMemOpType(const MemOp &Op, in getOptimalMemOpType()
19842 bool RISCVTargetLowering::splitValueIntoRegisterParts( in splitValueIntoRegisterParts()
19897 SDValue RISCVTargetLowering::joinRegisterPartsIntoValue( in joinRegisterPartsIntoValue()
19943 bool RISCVTargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const { in isIntDivCheap()
19951 bool RISCVTargetLowering::preferScalarizeSplat(SDNode *N) const { in preferScalarizeSplat()
19968 Value *RISCVTargetLowering::getIRStackGuard(IRBuilderBase &IRB) const { in getIRStackGuard()
19977 bool RISCVTargetLowering::isLegalInterleavedAccessType( in isLegalInterleavedAccessType()
20010 bool RISCVTargetLowering::isLegalStridedLoadStore(EVT DataType, in isLegalStridedLoadStore()
20048 bool RISCVTargetLowering::lowerInterleavedLoad( in lowerInterleavedLoad()
20100 bool RISCVTargetLowering::lowerInterleavedStore(StoreInst *SI, in lowerInterleavedStore()
20139 bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad(IntrinsicInst *DI, in lowerDeinterleaveIntrinsicToLoad()
20189 bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore(IntrinsicInst *II, in lowerInterleaveIntrinsicToStore()
20236 RISCVTargetLowering::EmitKCFICheck(MachineBasicBlock &MBB, in EmitKCFICheck()
20257 RISCVTargetLowering::getRegisterByName(const char *RegName, LLT VT, in getRegisterByName()
20273 RISCVTargetLowering::getTargetMMOFlags(const Instruction &I) const { in getTargetMMOFlags()
20308 RISCVTargetLowering::getTargetMMOFlags(const MemSDNode &Node) const { in getTargetMMOFlags()
20318 bool RISCVTargetLowering::areTwoSDNodeTargetMMOFlagsMergeable( in areTwoSDNodeTargetMMOFlagsMergeable()
20323 bool RISCVTargetLowering::isCtpopFast(EVT VT) const { in isCtpopFast()
20332 unsigned RISCVTargetLowering::getCustomCtpopCost(EVT VT, in getCustomCtpopCost()
20337 bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const { in fallBackToDAGISel()
20363 RISCVTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, in BuildSDIVPow2()
20383 bool RISCVTargetLowering::shouldFoldSelectWithSingleBitTest( in shouldFoldSelectWithSingleBitTest()
20390 unsigned RISCVTargetLowering::getMinimumJumpTableEntries() const { in getMinimumJumpTableEntries()