Lines Matching refs:IntNo
2431 unsigned IntNo = Op.getConstantOperandVal(HasChain ? 1 : 0); in getVLOperand() local
2433 RISCVVIntrinsicsTable::getRISCVVIntrinsicInfo(IntNo); in getVLOperand()
8240 unsigned IntNo = Op.getConstantOperandVal(HasChain ? 1 : 0); in lowerVectorIntrinsicScalars() local
8245 RISCVVIntrinsicsTable::getRISCVVIntrinsicInfo(IntNo); in lowerVectorIntrinsicScalars()
8293 switch (IntNo) { in lowerVectorIntrinsicScalars()
8362 if (IntNo == Intrinsic::riscv_vslide1up || in lowerVectorIntrinsicScalars()
8363 IntNo == Intrinsic::riscv_vslide1up_mask) { in lowerVectorIntrinsicScalars()
8483 unsigned IntNo = Op.getConstantOperandVal(0); in LowerINTRINSIC_WO_CHAIN() local
8487 switch (IntNo) { in LowerINTRINSIC_WO_CHAIN()
8503 switch (IntNo) { in LowerINTRINSIC_WO_CHAIN()
8526 IntNo == Intrinsic::riscv_sm4ks ? RISCVISD::SM4KS : RISCVISD::SM4ED; in LowerINTRINSIC_WO_CHAIN()
8544 IntNo == Intrinsic::riscv_zip ? RISCVISD::ZIP : RISCVISD::UNZIP; in LowerINTRINSIC_WO_CHAIN()
8561 IntNo == Intrinsic::riscv_clmulh ? RISCVISD::CLMULH : RISCVISD::CLMULR; in LowerINTRINSIC_WO_CHAIN()
8732 unsigned IntNo = Op.getConstantOperandVal(1); in LowerINTRINSIC_W_CHAIN() local
8733 switch (IntNo) { in LowerINTRINSIC_W_CHAIN()
8896 unsigned IntNo = Op.getConstantOperandVal(1); in LowerINTRINSIC_VOID() local
8897 switch (IntNo) { in LowerINTRINSIC_VOID()
11889 unsigned IntNo = N->getConstantOperandVal(0); in ReplaceNodeResults() local
11890 switch (IntNo) { in ReplaceNodeResults()
11910 switch (IntNo) { in ReplaceNodeResults()
11930 IntNo == Intrinsic::riscv_sm4ks ? RISCVISD::SM4KS : RISCVISD::SM4ED; in ReplaceNodeResults()
11974 unsigned Opc = IntNo == Intrinsic::riscv_clmulh ? RISCVISD::CLMULH in ReplaceNodeResults()
16008 unsigned IntNo = N->getConstantOperandVal(IntOpNo); in PerformDAGCombine() local
16009 switch (IntNo) { in PerformDAGCombine()
16055 if (IntNo == Intrinsic::riscv_vcpop_mask || in PerformDAGCombine()
16056 IntNo == Intrinsic::riscv_vfirst_mask) in PerformDAGCombine()
16063 if (IntNo == Intrinsic::riscv_vfirst || in PerformDAGCombine()
16064 IntNo == Intrinsic::riscv_vfirst_mask) in PerformDAGCombine()
16380 unsigned IntNo = in computeKnownBitsForTargetNode() local
16382 switch (IntNo) { in computeKnownBitsForTargetNode()
16388 bool HasAVL = IntNo == Intrinsic::riscv_vsetvli; in computeKnownBitsForTargetNode()
16468 unsigned IntNo = Op.getConstantOperandVal(1); in ComputeNumSignBitsForTargetNode() local
16469 switch (IntNo) { in ComputeNumSignBitsForTargetNode()