3814     unsigned ElemsPerVReg = MinVLen / ElemVT.getFixedSizeInBits();  in lowerBUILD_VECTOR()  local
3816     MVT OneRegVT = MVT::getVectorVT(ElemVT, ElemsPerVReg);  in lowerBUILD_VECTOR()
3827     for (unsigned i = 0; i < VT.getVectorNumElements(); i += ElemsPerVReg) {  in lowerBUILD_VECTOR()
3828       auto OneVRegOfOps = ArrayRef(BuildVectorOps).slice(i, ElemsPerVReg);  in lowerBUILD_VECTOR()
3832       unsigned InsertIdx = (i / ElemsPerVReg) * NumOpElts;  in lowerBUILD_VECTOR()
4678   unsigned ElemsPerVReg = MinVLen / ElemVT.getFixedSizeInBits();  in lowerShuffleViaVRegSplitting()  local
4679   unsigned VRegsPerSrc = NumElts / ElemsPerVReg;  in lowerShuffleViaVRegSplitting()
4688     int DstVecIdx = DstIdx / ElemsPerVReg;  in lowerShuffleViaVRegSplitting()
4689     int DstSubIdx = DstIdx % ElemsPerVReg;  in lowerShuffleViaVRegSplitting()
4693     int SrcVecIdx = SrcIdx / ElemsPerVReg;  in lowerShuffleViaVRegSplitting()
4694     int SrcSubIdx = SrcIdx % ElemsPerVReg;  in lowerShuffleViaVRegSplitting()
4703     OutMasks[DstVecIdx].second.resize(ElemsPerVReg, -1);  in lowerShuffleViaVRegSplitting()
4708   MVT OneRegVT = MVT::getVectorVT(ElemVT, ElemsPerVReg);  in lowerShuffleViaVRegSplitting()
7952       unsigned ElemsPerVReg = MinVLen / ElemVT.getFixedSizeInBits();  in lowerINSERT_VECTOR_ELT()  local
7953       unsigned RemIdx = OrigIdx % ElemsPerVReg;  in lowerINSERT_VECTOR_ELT()
7954       unsigned SubRegIdx = OrigIdx / ElemsPerVReg;  in lowerINSERT_VECTOR_ELT()
8165     unsigned ElemsPerVReg = MinVLen / ElemVT.getFixedSizeInBits();  in lowerEXTRACT_VECTOR_ELT()  local
8166     unsigned RemIdx = OrigIdx % ElemsPerVReg;  in lowerEXTRACT_VECTOR_ELT()
8167     unsigned SubRegIdx = OrigIdx / ElemsPerVReg;  in lowerEXTRACT_VECTOR_ELT()