296     bool IsMasked, bool IsStridedOrIndexed, SmallVectorImpl<SDValue> &Operands,  in addVectorLoadStoreOperands()  argument
309   if (IsMasked) {  in addVectorLoadStoreOperands()
329     if (IsMasked)  in addVectorLoadStoreOperands()
340 void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, bool IsMasked,  in selectVLSEG()  argument
357   addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked, IsStrided,  in selectVLSEG()
361       RISCV::getVLSEGPseudo(NF, IsMasked, IsStrided, /*FF*/ false, Log2SEW,  in selectVLSEG()
380 void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node, bool IsMasked) {  in selectVLSEGFF()  argument
397   addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked,  in selectVLSEGFF()
402       RISCV::getVLSEGPseudo(NF, IsMasked, /*Strided*/ false, /*FF*/ true,  in selectVLSEGFF()
422 void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, bool IsMasked,  in selectVLXSEG()  argument
440   addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked,  in selectVLXSEG()
454       NF, IsMasked, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL),  in selectVLXSEG()
473 void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, bool IsMasked,  in selectVSSEG()  argument
479   if (IsMasked)  in selectVSSEG()
491   addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked, IsStrided,  in selectVSSEG()
495       NF, IsMasked, IsStrided, Log2SEW, static_cast<unsigned>(LMUL));  in selectVSSEG()
505 void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, bool IsMasked,  in selectVSXSEG()  argument
509   if (IsMasked)  in selectVSXSEG()
522   addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked,  in selectVSXSEG()
536       NF, IsMasked, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL),  in selectVSXSEG()
1710       bool IsMasked = IntNo == Intrinsic::riscv_vloxei_mask ||  in Select()  local
1723       addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked,  in Select()
1738           IsMasked, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL),  in Select()
1754       bool IsMasked = IntNo == Intrinsic::riscv_vle_mask ||  in Select()  local
1780       addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked, IsStrided,  in Select()
1785           RISCV::getVLEPseudo(IsMasked, IsStrided, /*FF*/ false, Log2SEW,  in Select()
1798       bool IsMasked = IntNo == Intrinsic::riscv_vleff_mask;  in Select()  local
1806       addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked,  in Select()
1812           RISCV::getVLEPseudo(IsMasked, /*Strided*/ false, /*FF*/ true,  in Select()
1908       bool IsMasked = IntNo == Intrinsic::riscv_vsoxei_mask ||  in Select()  local
1921       addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked,  in Select()
1936           IsMasked, IsOrdered, IndexLog2EEW,  in Select()
1952       bool IsMasked = IntNo == Intrinsic::riscv_vse_mask ||  in Select()  local
1964       addVectorLoadStoreOperands(Node, Log2SEW, DL, CurOp, IsMasked, IsStrided,  in Select()
1969           IsMasked, IsStrided, Log2SEW, static_cast<unsigned>(LMUL));  in Select()
3517   bool IsMasked = false;  in performCombineVMergeAndVOps()  local
3522     IsMasked = true;  in performCombineVMergeAndVOps()
3546   if (IsMasked) {  in performCombineVMergeAndVOps()
3619   if (TrueVL != VL || !IsMasked)  in performCombineVMergeAndVOps()
3628   if (IsMasked) {  in performCombineVMergeAndVOps()
3678   const unsigned NormalOpsEnd = TrueVLIndex - IsMasked - HasRoundingMode;  in performCombineVMergeAndVOps()
3679   assert(!IsMasked || NormalOpsEnd == Info->MaskOpIdx);  in performCombineVMergeAndVOps()