66   MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0);  in createRISCVMCAsmInfo()  local
67   MAI->addInitialFrameState(Inst);  in createRISCVMCAsmInfo()
161   void updateState(const MCInst &Inst, uint64_t Addr) override {  in updateState()  argument
167     if (isTerminator(Inst) || isCall(Inst)) {  in updateState()
172     switch (Inst.getOpcode()) {  in updateState()
176       auto NumDefs = Info->get(Inst.getOpcode()).getNumDefs();  in updateState()
178         auto DefReg = Inst.getOperand(I).getReg();  in updateState()
185       setGPRState(Inst.getOperand(0).getReg(),  in updateState()
186                   Addr + (Inst.getOperand(1).getImm() << 12));  in updateState()
191   bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,  in evaluateBranch()  argument
193     if (isConditionalBranch(Inst)) {  in evaluateBranch()
196         Imm = Inst.getOperand(1).getImm();  in evaluateBranch()
198         Imm = Inst.getOperand(2).getImm();  in evaluateBranch()
203     if (Inst.getOpcode() == RISCV::C_JAL || Inst.getOpcode() == RISCV::C_J) {  in evaluateBranch()
204       Target = Addr + Inst.getOperand(0).getImm();  in evaluateBranch()
208     if (Inst.getOpcode() == RISCV::JAL) {  in evaluateBranch()
209       Target = Addr + Inst.getOperand(1).getImm();  in evaluateBranch()
213     if (Inst.getOpcode() == RISCV::JALR) {  in evaluateBranch()
214       if (auto TargetRegState = getGPRState(Inst.getOperand(1).getReg())) {  in evaluateBranch()
215         Target = *TargetRegState + Inst.getOperand(2).getImm();  in evaluateBranch()
225   bool isTerminator(const MCInst &Inst) const override {  in isTerminator()
226     if (MCInstrAnalysis::isTerminator(Inst))  in isTerminator()
229     switch (Inst.getOpcode()) {  in isTerminator()
234       return Inst.getOperand(0).getReg() == RISCV::X0;  in isTerminator()
238   bool isCall(const MCInst &Inst) const override {  in isCall()
239     if (MCInstrAnalysis::isCall(Inst))  in isCall()
242     switch (Inst.getOpcode()) {  in isCall()
247       return Inst.getOperand(0).getReg() != RISCV::X0;  in isCall()
251   bool isReturn(const MCInst &Inst) const override {  in isReturn()
252     if (MCInstrAnalysis::isReturn(Inst))  in isReturn()
255     switch (Inst.getOpcode()) {  in isReturn()
259       return Inst.getOperand(0).getReg() == RISCV::X0 &&  in isReturn()
260              maybeReturnAddress(Inst.getOperand(1).getReg());  in isReturn()
262       return maybeReturnAddress(Inst.getOperand(0).getReg());  in isReturn()
266   bool isBranch(const MCInst &Inst) const override {  in isBranch()
267     if (MCInstrAnalysis::isBranch(Inst))  in isBranch()
270     return isBranchImpl(Inst);  in isBranch()
273   bool isUnconditionalBranch(const MCInst &Inst) const override {  in isUnconditionalBranch()
274     if (MCInstrAnalysis::isUnconditionalBranch(Inst))  in isUnconditionalBranch()
277     return isBranchImpl(Inst);  in isUnconditionalBranch()
280   bool isIndirectBranch(const MCInst &Inst) const override {  in isIndirectBranch()
281     if (MCInstrAnalysis::isIndirectBranch(Inst))  in isIndirectBranch()
284     switch (Inst.getOpcode()) {  in isIndirectBranch()
288       return Inst.getOperand(0).getReg() == RISCV::X0 &&  in isIndirectBranch()
289              !maybeReturnAddress(Inst.getOperand(1).getReg());  in isIndirectBranch()
291       return !maybeReturnAddress(Inst.getOperand(0).getReg());  in isIndirectBranch()
301   static bool isBranchImpl(const MCInst &Inst) {  in isBranchImpl()  argument
302     switch (Inst.getOpcode()) {  in isBranchImpl()
306       return Inst.getOperand(0).getReg() == RISCV::X0;  in isBranchImpl()
308       return Inst.getOperand(0).getReg() == RISCV::X0 &&  in isBranchImpl()
309              !maybeReturnAddress(Inst.getOperand(1).getReg());  in isBranchImpl()
311       return !maybeReturnAddress(Inst.getOperand(0).getReg());  in isBranchImpl()