40 std::optional<MCFixupKind> RISCVAsmBackend::getFixupKind(StringRef Name) const {  in getFixupKind()
58 RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {  in getFixupKindInfo()
115 bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,  in shouldForceRelocation()
142 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,  in fixupNeedsRelaxationAdvanced()
179 void RISCVAsmBackend::relaxInstruction(MCInst &Inst,  in relaxInstruction()
209 bool RISCVAsmBackend::relaxDwarfLineAddr(MCDwarfLineAddrFragment &DF,  in relaxDwarfLineAddr()
275 bool RISCVAsmBackend::relaxDwarfCFA(MCDwarfCallFrameFragment &DF,  in relaxDwarfCFA()
339 std::pair<bool, bool> RISCVAsmBackend::relaxLEB128(MCLEBFragment &LF,  in relaxLEB128()
354 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const {  in getRelaxedOpcode()
380 bool RISCVAsmBackend::mayNeedRelaxation(const MCInst &Inst,  in mayNeedRelaxation()
385 bool RISCVAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,  in writeNopData()
526 bool RISCVAsmBackend::evaluateTargetFixup(  in evaluateTargetFixup()
588 bool RISCVAsmBackend::handleAddSubRelocations(const MCAsmLayout &Layout,  in handleAddSubRelocations()
634 void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,  in applyFixup()
668 bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign(  in shouldInsertExtraNopBytesForCodeAlign()
692 bool RISCVAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,  in shouldInsertFixupForCodeAlign()
722 RISCVAsmBackend::createObjectTargetWriter() const {  in createObjectTargetWriter()
732   return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), Options);  in createRISCVAsmBackend()