116                                             const MCFixup &Fixup,  in shouldForceRelocation()  argument
119   if (Fixup.getKind() >= FirstLiteralRelocationKind)  in shouldForceRelocation()
121   switch (Fixup.getTargetKind()) {  in shouldForceRelocation()
142 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,  in fixupNeedsRelaxationAdvanced()  argument
152   unsigned Kind = Fixup.getTargetKind();  in fixupNeedsRelaxationAdvanced()
236   std::pair<MCFixupKind, MCFixupKind> Fixup;  in relaxDwarfLineAddr()  local
250     Fixup = RISCV::getRelocPairForSize(PtrSize);  in relaxDwarfLineAddr()
255     Fixup = RISCV::getRelocPairForSize(2);  in relaxDwarfLineAddr()
260   Fixups.push_back(MCFixup::create(Offset, MBE.getLHS(), std::get<0>(Fixup)));  in relaxDwarfLineAddr()
261   Fixups.push_back(MCFixup::create(Offset, MBE.getRHS(), std::get<1>(Fixup)));  in relaxDwarfLineAddr()
304                                          std::pair<unsigned, unsigned> Fixup) {  in relaxDwarfCFA()  argument
309                                                  std::get<0>(Fixup))));  in relaxDwarfCFA()
313                                                  std::get<1>(Fixup))));  in relaxDwarfCFA()
413 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,  in adjustFixupValue()  argument
415   switch (Fixup.getTargetKind()) {  in adjustFixupValue()
436       Ctx.reportError(Fixup.getLoc(),  in adjustFixupValue()
451       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
453       Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");  in adjustFixupValue()
468       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
470       Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");  in adjustFixupValue()
495       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
511       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
527     const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup,  in evaluateTargetFixup()  argument
533   switch (Fixup.getTargetKind()) {  in evaluateTargetFixup()
538     AUIPCFixup = &Fixup;  in evaluateTargetFixup()
544     AUIPCFixup = cast<RISCVMCExpr>(Fixup.getValue())->getPCRelHiFixup(&AUIPCDF);  in evaluateTargetFixup()
546       Asm.getContext().reportError(Fixup.getLoc(),  in evaluateTargetFixup()
590                                               const MCFixup &Fixup,  in handleAddSubRelocations()  argument
595   switch (Fixup.getKind()) {  in handleAddSubRelocations()
622       Fixup.getOffset(), nullptr,  in handleAddSubRelocations()
625       Fixup.getOffset(), nullptr,  in handleAddSubRelocations()
634 void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,  in applyFixup()  argument
639   MCFixupKind Kind = Fixup.getKind();  in applyFixup()
647   Value = adjustFixupValue(Fixup, Value, Ctx);  in applyFixup()
652   unsigned Offset = Fixup.getOffset();  in applyFixup()
709   MCFixup Fixup =  in shouldInsertFixupForCodeAlign()  local
715   Asm.getWriter().recordRelocation(Asm, Layout, &AF, Fixup, NopBytes,  in shouldInsertFixupForCodeAlign()