Lines Matching refs:ErrorLoc

102   bool generateImmOutOfRangeError(SMLoc ErrorLoc, int64_t Lower, int64_t Upper,
122 bool generateVTypeError(SMLoc ErrorLoc);
1347 SMLoc ErrorLoc, int64_t Lower, int64_t Upper, in generateImmOutOfRangeError() argument
1349 return Error(ErrorLoc, Msg + " [" + Twine(Lower) + ", " + Twine(Upper) + "]"); in generateImmOutOfRangeError()
1355 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in generateImmOutOfRangeError() local
1356 return generateImmOutOfRangeError(ErrorLoc, Lower, Upper, Msg); in generateImmOutOfRangeError()
1396 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction() local
1399 return Error(ErrorLoc, "too few operands for instruction"); in MatchAndEmitInstruction()
1401 ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction()
1402 if (ErrorLoc == SMLoc()) in MatchAndEmitInstruction()
1403 ErrorLoc = IDLoc; in MatchAndEmitInstruction()
1405 return Error(ErrorLoc, "invalid operand for instruction"); in MatchAndEmitInstruction()
1413 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction() local
1415 return Error(ErrorLoc, "too few operands for instruction"); in MatchAndEmitInstruction()
1427 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1428 return Error(ErrorLoc, "operand must be a constant 64-bit integer"); in MatchAndEmitInstruction()
1435 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1436 return Error(ErrorLoc, "operand either must be a constant 64-bit integer " in MatchAndEmitInstruction()
1445 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1446 return Error(ErrorLoc, "immediate must be zero"); in MatchAndEmitInstruction()
1563 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1564 return Error(ErrorLoc, "operand must be a valid floating-point constant"); in MatchAndEmitInstruction()
1567 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1568 return Error(ErrorLoc, "operand must be a bare symbol name"); in MatchAndEmitInstruction()
1571 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1572 return Error(ErrorLoc, "operand must be a valid jump target"); in MatchAndEmitInstruction()
1575 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1576 return Error(ErrorLoc, "operand must be a bare symbol name"); in MatchAndEmitInstruction()
1579 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1580 return Error(ErrorLoc, "operand must be a symbol with %tprel_add modifier"); in MatchAndEmitInstruction()
1583 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1584 return Error(ErrorLoc, in MatchAndEmitInstruction()
1588 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1589 return Error(ErrorLoc, "operand must be 'rtz' floating-point rounding mode"); in MatchAndEmitInstruction()
1592 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1593 return generateVTypeError(ErrorLoc); in MatchAndEmitInstruction()
1596 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1597 return Error(ErrorLoc, "operand must be v0.t"); in MatchAndEmitInstruction()
1605 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1607 ErrorLoc, in MatchAndEmitInstruction()
1611 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1613 ErrorLoc, in MatchAndEmitInstruction()
1621 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1622 return Error(ErrorLoc, "operands must be register and register"); in MatchAndEmitInstruction()
2221 bool RISCVAsmParser::generateVTypeError(SMLoc ErrorLoc) { in generateVTypeError() argument
2223 ErrorLoc, in generateVTypeError()
3037 SMLoc ErrorLoc = Parser.getTok().getLoc(); in parseDirectiveInsn() local
3039 return Error(ErrorLoc, "expected instruction format"); in parseDirectiveInsn()
3044 return Error(ErrorLoc, "invalid instruction format"); in parseDirectiveInsn()
3347 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[3]).getStartLoc(); in checkPseudoAddTPRel() local
3348 return Error(ErrorLoc, "the second input operand must be tp/x4 when using " in checkPseudoAddTPRel()
3360 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[3]).getStartLoc(); in checkPseudoTLSDESCCall() local
3361 return Error(ErrorLoc, "the output operand must be t0/x5 when using " in checkPseudoTLSDESCCall()