Lines Matching refs:NegSizeReg

761   Register NegSizeReg = MI.getOperand(1).getReg();  in lowerDynamicAlloc()  local
763 prepareDynamicAlloca(II, NegSizeReg, KillNegSizeReg, Reg); in lowerDynamicAlloc()
770 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
778 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
792 Register &NegSizeReg, in prepareDynamicAlloca() argument
847 unsigned UnalNegSizeReg = NegSizeReg; in prepareDynamicAlloca()
848 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
852 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg) in prepareDynamicAlloca()
855 unsigned NegSizeReg1 = NegSizeReg; in prepareDynamicAlloca()
856 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
857 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg) in prepareDynamicAlloca()
864 unsigned UnalNegSizeReg = NegSizeReg; in prepareDynamicAlloca()
865 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
869 BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg) in prepareDynamicAlloca()
872 unsigned NegSizeReg1 = NegSizeReg; in prepareDynamicAlloca()
873 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
874 BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg) in prepareDynamicAlloca()
898 Register NegSizeReg = MI.getOperand(2).getReg(); in lowerPrepareProbedAlloca() local
901 if (FramePointer == NegSizeReg) { in lowerPrepareProbedAlloca()
908 .addReg(NegSizeReg) in lowerPrepareProbedAlloca()
909 .addReg(NegSizeReg); in lowerPrepareProbedAlloca()
910 NegSizeReg = ActualNegSizeReg; in lowerPrepareProbedAlloca()
913 prepareDynamicAlloca(II, NegSizeReg, KillNegSizeReg, FramePointer); in lowerPrepareProbedAlloca()
916 if (NegSizeReg != ActualNegSizeReg) in lowerPrepareProbedAlloca()
918 .addReg(NegSizeReg) in lowerPrepareProbedAlloca()
919 .addReg(NegSizeReg); in lowerPrepareProbedAlloca()