Lines Matching refs:DefMI
634 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local
636 if (!DefMI) in simplifyCode()
639 unsigned DefOpc = DefMI->getOpcode(); in simplifyCode()
649 TRI->lookThruCopyLike(DefMI->getOperand(1).getReg(), MRI); in simplifyCode()
673 Register DefReg1 = DefMI->getOperand(1).getReg(); in simplifyCode()
674 Register DefReg2 = DefMI->getOperand(2).getReg(); in simplifyCode()
675 unsigned DefImmed = DefMI->getOperand(3).getImm(); in simplifyCode()
724 .add(DefMI->getOperand(1)); in simplifyCode()
725 addRegToUpdate(DefMI->getOperand(0).getReg()); in simplifyCode()
726 addRegToUpdate(DefMI->getOperand(1).getReg()); in simplifyCode()
732 (DefMI->getOperand(2).getImm() == 0 || in simplifyCode()
733 DefMI->getOperand(2).getImm() == 3)) { in simplifyCode()
748 DefMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
767 TII->isLoadFromConstantPool(DefMI)) { in simplifyCode()
768 const Constant *C = TII->getConstantFromConstantPool(DefMI); in simplifyCode()
793 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
794 if (!DefMI) in simplifyCode()
796 unsigned DefOpcode = DefMI->getOpcode(); in simplifyCode()
800 Register ConvReg = DefMI->getOperand(1).getReg(); in simplifyCode()
829 Register ShiftRes = DefMI->getOperand(0).getReg(); in simplifyCode()
830 Register ShiftOp1 = DefMI->getOperand(1).getReg(); in simplifyCode()
831 Register ShiftOp2 = DefMI->getOperand(2).getReg(); in simplifyCode()
832 unsigned ShiftImm = DefMI->getOperand(3).getImm(); in simplifyCode()
839 LLVM_DEBUG(DefMI->dump()); in simplifyCode()
840 ToErase = DefMI; in simplifyCode()
860 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
864 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
866 TRI->lookThruCopyLike(DefMI->getOperand(1).getReg(), MRI); in simplifyCode()
868 TRI->lookThruCopyLike(DefMI->getOperand(2).getReg(), MRI); in simplifyCode()
897 LLVM_DEBUG(DefMI->dump()); in simplifyCode()