Lines Matching refs:RegVT
5544 const MVT RegVT = Subtarget.isPPC64() ? MVT::i64 : MVT::i32; in prepareDescriptorIndirectCall() local
5548 SDValue LoadFuncPtr = DAG.getLoad(RegVT, dl, LDChain, Callee, MPI, in prepareDescriptorIndirectCall()
5554 SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, Callee, TOCOff); in prepareDescriptorIndirectCall()
5556 DAG.getLoad(RegVT, dl, LDChain, AddTOC, in prepareDescriptorIndirectCall()
5561 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, RegVT, Callee, PtrOff); in prepareDescriptorIndirectCall()
5563 DAG.getLoad(RegVT, dl, LDChain, AddPtr, in prepareDescriptorIndirectCall()
5596 const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32; in buildCallOperands() local
5619 SDValue StackPtr = DAG.getRegister(StackPtrReg, RegVT); in buildCallOperands()
5622 SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, StackPtr, TOCOff); in buildCallOperands()
5629 RegVT)); in buildCallOperands()
5634 Ops.push_back(DAG.getRegister(IsPPC64 ? PPC::CTR8 : PPC::CTR, RegVT)); in buildCallOperands()
5652 Ops.push_back(DAG.getRegister(Subtarget.getTOCPointerRegister(), RegVT)); in buildCallOperands()
6737 const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32; in CC_AIX() local
6768 State.getStackSize(), RegVT, LocInfo)); in CC_AIX()
6777 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, RegVT, LocInfo)); in CC_AIX()
6800 if (ValVT.getFixedSizeInBits() < RegVT.getFixedSizeInBits()) in CC_AIX()
6804 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, RegVT, LocInfo)); in CC_AIX()
6806 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, RegVT, LocInfo)); in CC_AIX()
6832 CCValAssign::getCustomReg(ValNo, ValVT, Reg, RegVT, LocInfo)); in CC_AIX()
6931 CCValAssign::getCustomReg(ValNo, ValVT, FirstReg, RegVT, LocInfo)); in CC_AIX()
6933 CCValAssign::getCustomReg(ValNo, ValVT, SecondReg, RegVT, LocInfo)); in CC_AIX()
6947 CCValAssign::getCustomReg(ValNo, ValVT, Reg, RegVT, LocInfo)); in CC_AIX()