Lines Matching refs:INSERT_VECTOR_ELT

861       setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand);  in PPCTargetLowering()
944       setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f64, Custom);  in PPCTargetLowering()
1193       setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);  in PPCTargetLowering()
1194       setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);  in PPCTargetLowering()
1302         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i64, Legal);  in PPCTargetLowering()
1303         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Legal);  in PPCTargetLowering()
1304         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Legal);  in PPCTargetLowering()
1305         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Legal);  in PPCTargetLowering()
1307         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);  in PPCTargetLowering()
1308         setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom);  in PPCTargetLowering()
11280   assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT &&  in LowerINSERT_VECTOR_ELT()
11307           DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v4i32, BitcastVector,  in LowerINSERT_VECTOR_ELT()
11664   case ISD::INSERT_VECTOR_ELT:  return LowerINSERT_VECTOR_ELT(Op, DAG);  in LowerOperation()