Lines Matching refs:LZ
293 unsigned LZ = llvm::countl_zero<uint64_t>(Imm); in selectI64ImmDirect() local
310 if (TZ > 15 && (LZ > 32 || LO > 32)) in selectI64ImmDirect()
317 assert(LZ < 64 && "Unexpected leading zeros here."); in selectI64ImmDirect()
319 unsigned FO = llvm::countl_one<uint64_t>(Imm << LZ); in selectI64ImmDirect()
341 if ((LZ + FO + TZ) > 48) { in selectI64ImmDirect()
350 .addImm(LZ) in selectI64ImmDirect()
368 if ((LZ + TO) > 48) { in selectI64ImmDirect()
372 assert(LZ <= 32 && "Unexpected shift value."); in selectI64ImmDirect()
375 .addImm(Imm >> (48 - LZ) & 0xffff) in selectI64ImmDirect()
380 .addImm(48 - LZ) in selectI64ImmDirect()
381 .addImm(LZ) in selectI64ImmDirect()
400 if ((LZ + FO + TO) > 48) { in selectI64ImmDirect()
409 .addImm(LZ) in selectI64ImmDirect()
416 if (LZ == 32 && ((Lo32 & 0x8000) == 0)) { in selectI64ImmDirect()
469 if ((LZ + FO + TZ) > 32) { in selectI64ImmDirect()
486 .addImm(LZ) in selectI64ImmDirect()
494 if ((LZ + TO) > 32) { in selectI64ImmDirect()
498 assert(LZ <= 32 && "Unexpected shift value."); in selectI64ImmDirect()
502 .addImm((Imm >> (48 - LZ)) & 0xffff) in selectI64ImmDirect()
507 .addImm((Imm >> (32 - LZ)) & 0xffff) in selectI64ImmDirect()
512 .addImm(32 - LZ) in selectI64ImmDirect()
513 .addImm(LZ) in selectI64ImmDirect()
522 if ((LZ + FO + TO) > 32) { in selectI64ImmDirect()
537 .addImm(LZ) in selectI64ImmDirect()