Lines Matching refs:Ws
2660 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVEV() local
2676 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVEV()
2678 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVEV()
2682 return DAG.getNode(MipsISD::ILVEV, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVEV()
2706 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVOD() local
2722 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVOD()
2724 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVOD()
2728 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws); in lowerVECTOR_SHUFFLE_ILVOD()
2753 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVR() local
2769 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVR()
2771 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVR()
2775 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVR()
2801 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVL() local
2817 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVL()
2820 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVL()
2824 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVL()
2848 SDValue Ws; in lowerVECTOR_SHUFFLE_PCKEV() local
2861 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_PCKEV()
2863 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_PCKEV()
2867 return DAG.getNode(MipsISD::PCKEV, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_PCKEV()
2891 SDValue Ws; in lowerVECTOR_SHUFFLE_PCKOD() local
2904 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_PCKOD()
2906 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_PCKOD()
2910 return DAG.getNode(MipsISD::PCKOD, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_PCKOD()
3162 Register Ws = MI.getOperand(1).getReg(); in emitCOPY_FW() local
3166 unsigned Wt = Ws; in emitCOPY_FW()
3172 BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Wt).addReg(Ws); in emitCOPY_FW()
3181 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(Lane); in emitCOPY_FW()
3207 Register Ws = MI.getOperand(1).getReg(); in emitCOPY_FD() local
3212 BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Ws, 0, Mips::sub_64); in emitCOPY_FD()
3216 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_D), Wt).addReg(Ws).addImm(1); in emitCOPY_FD()
3501 Register Ws = MI.getOperand(0).getReg(); in emitST_F16_PSEUDO() local
3516 BuildMI(*BB, MI, DL, TII->get(Mips::COPY_U_H), Rs).addReg(Ws).addImm(0); in emitST_F16_PSEUDO()
3756 Register Ws = MI.getOperand(1).getReg(); in emitFPEXTEND_PSEUDO() local
3769 BuildMI(*BB, MI, DL, TII->get(Mips::FEXUPR_W), Wtemp).addReg(Ws); in emitFPEXTEND_PSEUDO()