Lines Matching refs:GPR32RegClass

67   addRegisterClass(MVT::i32, &Mips::GPR32RegClass);  in MipsSETargetLowering()
3025   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in emitBPOSGE32()
3094   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in emitMSACBranchPseudo()
3326       Subtarget.isABI_N64() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitINSERT_DF_VIDX()
3511                                : (Subtarget.isABI_O32() ? &Mips::GPR32RegClass  in emitST_F16_PSEUDO()
3513   const bool UsingMips32 = RC == &Mips::GPR32RegClass;  in emitST_F16_PSEUDO()
3514   Register Rs = RegInfo.createVirtualRegister(&Mips::GPR32RegClass);  in emitST_F16_PSEUDO()
3563                                : (Subtarget.isABI_O32() ? &Mips::GPR32RegClass  in emitLD_F16_PSEUDO()
3566   const bool UsingMips32 = RC == &Mips::GPR32RegClass;  in emitLD_F16_PSEUDO()
3575     Register Tmp = RegInfo.createVirtualRegister(&Mips::GPR32RegClass);  in emitLD_F16_PSEUDO()
3656       IsFGR64onMips64 ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitFPROUND_PSEUDO()
3760       IsFGR64onMips64 ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitFPEXTEND_PSEUDO()