Lines Matching refs:ST
68 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { in MipsLegalizerInfo() argument
83 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
86 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
107 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
110 {s32, p0, 16, ST.systemSupportsUnalignedAccess()}, in MipsLegalizerInfo()
113 {s64, p0, 64, ST.systemSupportsUnalignedAccess()}})) in MipsLegalizerInfo()
115 if (ST.hasMSA() && CheckTy0Ty1MemSizeAlign( in MipsLegalizerInfo()
126 .customIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
141 if (!ST.systemSupportsUnalignedAccess() && in MipsLegalizerInfo()
199 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
202 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
242 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
243 if (ST.hasMips32r2() && CheckTyN(0, Query, {s32})) in MipsLegalizerInfo()
247 .lowerIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
248 if (!ST.hasMips32r2() && CheckTyN(0, Query, {s32})) in MipsLegalizerInfo()
282 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
285 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
330 verify(*ST.getInstrInfo()); in MipsLegalizerInfo()
471 const MipsSubtarget &ST) { in SelectMSA3OpIntrinsic() argument
472 assert(ST.hasMSA() && "MSA intrinsic not supported on target without MSA."); in SelectMSA3OpIntrinsic()
477 .constrainAllUses(MIRBuilder.getTII(), *ST.getRegisterInfo(), in SelectMSA3OpIntrinsic()
478 *ST.getRegBankInfo())) in SelectMSA3OpIntrinsic()
486 const MipsSubtarget &ST) { in MSA3OpIntrinsicToGeneric() argument
487 assert(ST.hasMSA() && "MSA intrinsic not supported on target without MSA."); in MSA3OpIntrinsicToGeneric()
498 const MipsSubtarget &ST) { in MSA2OpIntrinsicToGeneric() argument
499 assert(ST.hasMSA() && "MSA intrinsic not supported on target without MSA."); in MSA2OpIntrinsicToGeneric()
510 const MipsSubtarget &ST = MI.getMF()->getSubtarget<MipsSubtarget>(); in legalizeIntrinsic() local
511 const MipsInstrInfo &TII = *ST.getInstrInfo(); in legalizeIntrinsic()
512 const MipsRegisterInfo &TRI = *ST.getRegisterInfo(); in legalizeIntrinsic()
513 const RegisterBankInfo &RBI = *ST.getRegBankInfo(); in legalizeIntrinsic()
538 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_ADD, MIRBuilder, ST); in legalizeIntrinsic()
540 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_B, MIRBuilder, ST); in legalizeIntrinsic()
542 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_H, MIRBuilder, ST); in legalizeIntrinsic()
544 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_W, MIRBuilder, ST); in legalizeIntrinsic()
546 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_D, MIRBuilder, ST); in legalizeIntrinsic()
551 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SUB, MIRBuilder, ST); in legalizeIntrinsic()
553 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_B, MIRBuilder, ST); in legalizeIntrinsic()
555 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_H, MIRBuilder, ST); in legalizeIntrinsic()
557 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_W, MIRBuilder, ST); in legalizeIntrinsic()
559 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_D, MIRBuilder, ST); in legalizeIntrinsic()
564 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_MUL, MIRBuilder, ST); in legalizeIntrinsic()
569 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SDIV, MIRBuilder, ST); in legalizeIntrinsic()
574 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SREM, MIRBuilder, ST); in legalizeIntrinsic()
579 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_UDIV, MIRBuilder, ST); in legalizeIntrinsic()
584 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_UREM, MIRBuilder, ST); in legalizeIntrinsic()
587 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FADD, MIRBuilder, ST); in legalizeIntrinsic()
590 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FSUB, MIRBuilder, ST); in legalizeIntrinsic()
593 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FMUL, MIRBuilder, ST); in legalizeIntrinsic()
596 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FDIV, MIRBuilder, ST); in legalizeIntrinsic()
598 return SelectMSA3OpIntrinsic(MI, Mips::FMAX_A_W, MIRBuilder, ST); in legalizeIntrinsic()
600 return SelectMSA3OpIntrinsic(MI, Mips::FMAX_A_D, MIRBuilder, ST); in legalizeIntrinsic()
602 return MSA2OpIntrinsicToGeneric(MI, TargetOpcode::G_FSQRT, MIRBuilder, ST); in legalizeIntrinsic()
604 return MSA2OpIntrinsicToGeneric(MI, TargetOpcode::G_FSQRT, MIRBuilder, ST); in legalizeIntrinsic()