Lines Matching refs:GPR32RegClass
4136 return std::make_pair(0U, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4140 return std::make_pair(0U, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4165 return std::make_pair((unsigned)Mips::T9, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4784 Register Temp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4793 Register LoadHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4794 Register LoadFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4795 Register Undef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4839 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4840 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4858 Register LoHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4859 Register LoFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4860 Register LoUndef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4861 Register HiHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4862 Register HiFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4863 Register HiUndef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4915 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_W()
4928 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_W()
4980 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
4981 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
5006 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
5007 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()