Lines Matching refs:DstReg
631 const DebugLoc &DL, MCRegister DstReg, in copyPhysReg() argument
636 if (M68k::XR32RegClass.contains(DstReg, SrcReg)) in copyPhysReg()
638 else if (M68k::XR16RegClass.contains(DstReg, SrcReg)) in copyPhysReg()
640 else if (M68k::DR8RegClass.contains(DstReg, SrcReg)) in copyPhysReg()
644 BuildMI(MBB, MI, DL, get(Opc), DstReg) in copyPhysReg()
657 if (M68k::XR16RegClass.contains(DstReg)) in copyPhysReg()
659 else if (M68k::XR32RegClass.contains(DstReg)) in copyPhysReg()
662 M68k::XR32RegClass.contains(DstReg)) in copyPhysReg()
666 BuildMI(MBB, MI, DL, get(Opc), DstReg) in copyPhysReg()
673 bool ToCCR = DstReg == M68k::CCR; in copyPhysReg()
674 bool ToSR = DstReg == M68k::SR; in copyPhysReg()
677 assert(M68k::DR8RegClass.contains(DstReg) && in copyPhysReg()
688 BuildMI(MBB, MI, DL, get(Opc), DstReg) in copyPhysReg()
694 << RI.getName(DstReg) << '\n'); in copyPhysReg()
727 unsigned getLoadRegOpcode(unsigned DstReg, const TargetRegisterClass *RC, in getLoadRegOpcode() argument
730 return getLoadStoreRegOpcode(DstReg, RC, TRI, STI, true); in getLoadRegOpcode()
762 Register DstReg, int FrameIndex, in loadRegFromStackSlot() argument
771 unsigned Opc = getLoadRegOpcode(DstReg, RC, TRI, Subtarget); in loadRegFromStackSlot()
773 M68k::addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DstReg), FrameIndex); in loadRegFromStackSlot()