Lines Matching refs:DstR
1724 Register DstR = MI->getOperand(0).getReg(); in expandCopy() local
1726 if (!Hexagon::ModRegsRegClass.contains(DstR) || in expandCopy()
1732 BuildMI(B, It, DL, HII.get(TargetOpcode::COPY), DstR) in expandCopy()
1782 Register DstR = MI->getOperand(0).getReg(); in expandLoadInt() local
1796 BuildMI(B, It, DL, HII.get(TfrOpc), DstR) in expandLoadInt()
1849 Register DstR = MI->getOperand(0).getReg(); in expandLoadVecPred() local
1866 BuildMI(B, It, DL, HII.get(Hexagon::V6_vandvrt), DstR) in expandLoadVecPred()
1947 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec2() local
1948 Register DstHi = HRI.getSubReg(DstR, Hexagon::vsub_hi); in expandLoadVec2()
1949 Register DstLo = HRI.getSubReg(DstR, Hexagon::vsub_lo); in expandLoadVec2()
2017 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec() local
2024 BuildMI(B, It, DL, HII.get(LoadOpc), DstR) in expandLoadVec()
2460 Register DstR = MI.getOperand(0).getReg(); in optimizeSpillSlots() local
2463 if (DstR != FoundR) { in optimizeSpillSlots()
2472 CopyOut = BuildMI(B, It, DL, HII.get(CopyOpc), DstR) in optimizeSpillSlots()