Lines Matching refs:RegisterRef
239 static bool getSubregMask(const BitTracker::RegisterRef &RR,
246 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH,
255 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
256 static bool isTransparentCopy(const BitTracker::RegisterRef &RD,
257 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
435 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, in getSubregMask()
463 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, in parseRegSequence()
926 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { in getFinalVRegClass()
956 bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD, in isTransparentCopy()
957 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy()
1095 bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
1244 BitTracker::RegisterRef UR = *I; in computeUsedBits()
1289 BitTracker::RegisterRef RR = MI.getOperand(OpN); in computeUsedBits()
1306 bool RedundantInstrElimination::usedBitsEqual(BitTracker::RegisterRef RD, in usedBitsEqual()
1307 BitTracker::RegisterRef RS) { in usedBitsEqual()
1347 BitTracker::RegisterRef RD = MI->getOperand(0); in processBlock()
1357 BitTracker::RegisterRef RS = Op; in processBlock()
1541 bool findMatch(const BitTracker::RegisterRef &Inp,
1542 BitTracker::RegisterRef &Out, const RegisterSet &AVs);
1573 bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp, in findMatch()
1574 BitTracker::RegisterRef &Out, const RegisterSet &AVs) { in findMatch()
1641 BitTracker::RegisterRef MR; in processBlock()
1648 BT.put(BitTracker::RegisterRef(NewR), BT.get(MR)); in processBlock()
1659 BitTracker::RegisterRef TL = { R, SubLo }; in processBlock()
1660 BitTracker::RegisterRef TH = { R, SubHi }; in processBlock()
1661 BitTracker::RegisterRef ML, MH; in processBlock()
1670 BT.put(BitTracker::RegisterRef(NewR), BT.get(R)); in processBlock()
1702 BitTracker::RegisterRef RD = MI.getOperand(0); in propagateRegCopy()
1709 BitTracker::RegisterRef RS = MI.getOperand(1); in propagateRegCopy()
1719 BitTracker::RegisterRef SL, SH; in propagateRegCopy()
1734 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy()
1744 BitTracker::RegisterRef RS = MI.getOperand(SrcX); in propagateRegCopy()
1784 struct RegHalf : public BitTracker::RegisterRef {
1790 bool validateReg(BitTracker::RegisterRef R, unsigned Opc, unsigned OpNum);
1793 BitTracker::RegisterRef &Rs, BitTracker::RegisterRef &Rt);
1798 bool genPackhl(MachineInstr *MI, BitTracker::RegisterRef RD,
1800 bool genExtractHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1802 bool genCombineHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1804 bool genExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1806 bool genBitSplit(MachineInstr *MI, BitTracker::RegisterRef RD,
1808 bool simplifyTstbit(MachineInstr *MI, BitTracker::RegisterRef RD,
1810 bool simplifyExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1812 bool simplifyRCmp0(MachineInstr *MI, BitTracker::RegisterRef RD);
1909 bool BitSimplification::validateReg(BitTracker::RegisterRef R, unsigned Opc, in validateReg()
1919 const BitTracker::RegisterCell &RC, BitTracker::RegisterRef &Rs, in matchPackhl()
1920 BitTracker::RegisterRef &Rt) { in matchPackhl()
1955 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf()
2000 BitTracker::RegisterRef RS = MI->getOperand(2); in genStoreImmediate()
2049 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genPackhl()
2053 BitTracker::RegisterRef Rs, Rt; in genPackhl()
2069 BT.put(BitTracker::RegisterRef(NewR), RC); in genPackhl()
2076 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractHalf()
2108 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractHalf()
2115 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genCombineHalf()
2140 BT.put(BitTracker::RegisterRef(NewR), RC); in genCombineHalf()
2147 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractLow()
2178 BitTracker::RegisterRef RS = Op; in genExtractLow()
2200 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractLow()
2207 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in genBitSplit()
2360 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in simplifyTstbit()
2366 BitTracker::RegisterRef RS = MI->getOperand(1); in simplifyTstbit()
2383 BitTracker::RegisterRef RR(V.RefI.Reg, 0); in simplifyTstbit()
2420 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in simplifyExtractLow()
2603 BT.put(BitTracker::RegisterRef(NewR), RC); in simplifyExtractLow()
2612 BitTracker::RegisterRef RD) { in simplifyRCmp0()
2632 BitTracker::RegisterRef SR = MI->getOperand(1); in simplifyRCmp0()
2658 BT.put(BitTracker::RegisterRef(NewR), NewRC); in simplifyRCmp0()
2724 BT.put(BitTracker::RegisterRef(NewR), NewRC); in simplifyRCmp0()
2761 BitTracker::RegisterRef RD = Op0; in processBlock()
2948 BitTracker::RegisterRef Inp, Out;
2955 BitTracker::RegisterRef LR, PR; // Loop Register, Preheader Register