Lines Matching refs:Decoder
81 static HexagonDisassembler const &disassembler(const MCDisassembler *Decoder) { in disassembler() argument
82 return *static_cast<HexagonDisassembler const *>(Decoder); in disassembler()
86 const MCDisassembler *Decoder) { in signedDecoder() argument
87 HexagonDisassembler const &Disassembler = disassembler(Decoder); in signedDecoder()
99 const MCDisassembler *Decoder);
103 const MCDisassembler *Decoder);
106 const MCDisassembler *Decoder);
109 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder);
116 const MCDisassembler *Decoder);
119 const MCDisassembler *Decoder);
122 const MCDisassembler *Decoder);
125 const MCDisassembler *Decoder);
128 const MCDisassembler *Decoder);
131 const MCDisassembler *Decoder);
134 const MCDisassembler *Decoder);
137 const MCDisassembler *Decoder);
140 const MCDisassembler *Decoder);
143 const MCDisassembler *Decoder);
146 const MCDisassembler *Decoder);
149 const MCDisassembler *Decoder);
153 const MCDisassembler *Decoder);
156 const MCDisassembler *Decoder);
158 const MCDisassembler *Decoder);
551 const MCDisassembler *Decoder) { in DecodeIntRegsLow8RegisterClass() argument
552 return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder); in DecodeIntRegsLow8RegisterClass()
557 const MCDisassembler *Decoder) { in DecodeIntRegsRegisterClass() argument
573 const MCDisassembler *Decoder) { in DecodeGeneralSubRegsRegisterClass() argument
586 const MCDisassembler *Decoder) { in DecodeHvxVRRegisterClass() argument
602 const MCDisassembler *Decoder) { in DecodeDoubleRegsRegisterClass() argument
615 const MCDisassembler *Decoder) { in DecodeGeneralDoubleLow8RegsRegisterClass() argument
625 const MCDisassembler *Decoder) { in DecodeHvxWRRegisterClass() argument
643 const MCDisassembler *Decoder) { in DecodeHvxVQRRegisterClass() argument
653 const MCDisassembler *Decoder) { in DecodePredRegsRegisterClass() argument
662 const MCDisassembler *Decoder) { in DecodeHvxQRRegisterClass() argument
671 const MCDisassembler *Decoder) { in DecodeCtrRegsRegisterClass() argument
699 const MCDisassembler *Decoder) { in DecodeCtrRegs64RegisterClass() argument
727 const MCDisassembler *Decoder) { in DecodeModRegsRegisterClass() argument
745 const MCDisassembler *Decoder) { in unsignedImmDecoder() argument
746 HexagonDisassembler const &Disassembler = disassembler(Decoder); in unsignedImmDecoder()
755 const MCDisassembler *Decoder) { in s32_0ImmDecoder() argument
756 HexagonDisassembler const &Disassembler = disassembler(Decoder); in s32_0ImmDecoder()
759 signedDecoder<32>(MI, tmp, Decoder); in s32_0ImmDecoder()
765 const MCDisassembler *Decoder) { in brtargetDecoder() argument
766 HexagonDisassembler const &Disassembler = disassembler(Decoder); in brtargetDecoder()
811 const MCDisassembler *Decoder) { in DecodeSysRegsRegisterClass() argument
838 const MCDisassembler *Decoder) { in DecodeSysRegs64RegisterClass() argument
853 const MCDisassembler *Decoder) { in DecodeGuestRegsRegisterClass() argument
880 const MCDisassembler *Decoder) { in DecodeGuestRegs64RegisterClass() argument