Lines Matching refs:HasCC
188 bool LiveCPSR, bool &HasCC, bool &CCDead);
332 bool LiveCPSR, bool &HasCC, bool &CCDead) { in VerifyPredAndCC() argument
337 if (!HasCC) { in VerifyPredAndCC()
342 HasCC = true; in VerifyPredAndCC()
350 if (HasCC) in VerifyPredAndCC()
356 if (HasCC) in VerifyPredAndCC()
362 HasCC = true; in VerifyPredAndCC()
365 if (HasCC) in VerifyPredAndCC()
811 bool HasCC = false; in ReduceTo2Addr() local
816 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceTo2Addr()
817 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceTo2Addr()
820 if (!VerifyPredAndCC(MI, Entry, true, Pred, LiveCPSR, HasCC, CCDead)) in ReduceTo2Addr()
825 if (Entry.PartFlag && NewMCID.hasOptionalDef() && HasCC && in ReduceTo2Addr()
834 MIB.add(HasCC ? t1CondCodeOp(CCDead) : condCodeOp()); in ReduceTo2Addr()
903 bool HasCC = false; in ReduceToNarrow() local
907 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR); in ReduceToNarrow()
908 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceToNarrow()
911 if (!VerifyPredAndCC(MI, Entry, false, Pred, LiveCPSR, HasCC, CCDead)) in ReduceToNarrow()
916 if (Entry.PartFlag && NewMCID.hasOptionalDef() && HasCC && in ReduceToNarrow()
934 MIB.add(HasCC ? t1CondCodeOp(CCDead) : condCodeOp()); in ReduceToNarrow()
939 MIB.add(HasCC ? t1CondCodeOp(CCDead) : condCodeOp()); in ReduceToNarrow()