73   Register PredReg;  in ReplaceTailWithBranchTo()  local
74   ARMCC::CondCodes CC = getInstrPredicate(*Tail, PredReg);  in ReplaceTailWithBranchTo()
121   Register PredReg;  in isLegalToSplitMBBAt()  local
122   return getITInstrPredicate(*MBBI, PredReg) == ARMCC::AL;  in isLegalToSplitMBBAt()
293                                   ARMCC::CondCodes Pred, Register PredReg,  in emitT2RegPlusImmediate()  argument
299       .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
316         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
323         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
332             .add(predOps(Pred, PredReg))  in emitT2RegPlusImmediate()
344             .add(predOps(Pred, PredReg))  in emitT2RegPlusImmediate()
553     Register PredReg;  in rewriteT2FrameIndex()  local
554     if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&  in rewriteT2FrameIndex()
767                                            Register &PredReg) {  in getITInstrPredicate()  argument
771   return getInstrPredicate(MI, PredReg);  in getITInstrPredicate()
785                                             Register &PredReg) {  in getVPTInstrPredicate()  argument
788     PredReg = 0;  in getVPTInstrPredicate()
792   PredReg = MI.getOperand(PIdx+1).getReg();  in getVPTInstrPredicate()