Lines Matching refs:getReg
107 printRegName(O, Dst.getReg()); in printInst()
109 printRegName(O, MO1.getReg()); in printInst()
112 printRegName(O, MO2.getReg()); in printInst()
129 printRegName(O, Dst.getReg()); in printInst()
131 printRegName(O, MO1.getReg()); in printInst()
148 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
162 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
167 printRegName(O, MI->getOperand(1).getReg()); in printInst()
177 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
191 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
196 printRegName(O, MI->getOperand(0).getReg()); in printInst()
206 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
219 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
231 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
233 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
262 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
313 unsigned Reg = Op.getReg(); in printOperand()
401 printRegName(O, MO1.getReg()); in printSORegRegOperand()
410 printRegName(O, MO2.getReg()); in printSORegRegOperand()
420 printRegName(O, MO1.getReg()); in printSORegImmOperand()
440 printRegName(O, MO1.getReg()); in printAM2PreOrOffsetIndexOp()
442 if (!MO2.getReg()) { in printAM2PreOrOffsetIndexOp()
455 printRegName(O, MO2.getReg()); in printAM2PreOrOffsetIndexOp()
470 printRegName(O, MO1.getReg()); in printAddrModeTBB()
472 printRegName(O, MO2.getReg()); in printAddrModeTBB()
483 printRegName(O, MO1.getReg()); in printAddrModeTBH()
485 printRegName(O, MO2.getReg()); in printAddrModeTBH()
517 if (!MO1.getReg()) { in printAddrMode2OffsetOperand()
526 printRegName(O, MO1.getReg()); in printAddrMode2OffsetOperand()
545 printRegName(O, MO1.getReg()); in printAM3PreOrOffsetIndexOp()
547 if (MO2.getReg()) { in printAM3PreOrOffsetIndexOp()
549 printRegName(O, MO2.getReg()); in printAM3PreOrOffsetIndexOp()
588 if (MO1.getReg()) { in printAddrMode3OffsetOperand()
590 printRegName(O, MO1.getReg()); in printAddrMode3OffsetOperand()
616 printRegName(O, MO1.getReg()); in printPostIdxRegOperand()
637 printRegName(O, MO1.getReg()); in printMveAddrModeRQOperand()
639 printRegName(O, MO2.getReg()); in printMveAddrModeRQOperand()
669 printRegName(O, MO1.getReg()); in printAddrMode5Operand()
695 printRegName(O, MO1.getReg()); in printAddrMode5FP16Operand()
716 printRegName(O, MO1.getReg()); in printAddrMode6Operand()
729 printRegName(O, MO1.getReg()); in printAddrMode7Operand()
738 if (MO.getReg() == 0) in printAddrMode6OffsetOperand()
742 printRegName(O, MO.getReg()); in printAddrMode6OffsetOperand()
825 return MRI.getEncodingValue(LHS.getReg()) < in printRegisterList()
826 MRI.getEncodingValue(RHS.getReg()); in printRegisterList()
834 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
842 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
1011 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
1012 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1111 printRegName(O, MO1.getReg()); in printThumbAddrModeRROperand()
1112 if (unsigned RegNum = MO2.getReg()) { in printThumbAddrModeRROperand()
1134 printRegName(O, MO1.getReg()); in printThumbAddrModeImm5SOperand()
1179 unsigned Reg = MO1.getReg(); in printT2SOOperand()
1202 printRegName(O, MO1.getReg()); in printAddrModeImm12Operand()
1229 printRegName(O, MO1.getReg()); in printT2AddrModeImm8Operand()
1261 printRegName(O, MO1.getReg()); in printT2AddrModeImm8s4Operand()
1289 printRegName(O, MO1.getReg()); in printT2AddrModeImm0_1020s4Operand()
1340 printRegName(O, MO1.getReg()); in printT2AddrModeSoRegOperand()
1342 assert(MO2.getReg() && "Invalid so_reg load / store address!"); in printT2AddrModeSoRegOperand()
1344 printRegName(O, MO2.getReg()); in printT2AddrModeSoRegOperand()
1408 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1454 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1461 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1474 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1491 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1493 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1495 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1506 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1508 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1510 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1512 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1521 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1529 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1547 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1549 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1551 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1563 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1565 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1567 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1569 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1576 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1593 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1595 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1597 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1608 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1610 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1612 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1614 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1626 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1628 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1630 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1641 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1643 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1645 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1647 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1655 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()