Lines Matching refs:getOperand
97 const MCOperand &Dst = MI->getOperand(0); in printInst()
98 const MCOperand &MO1 = MI->getOperand(1); in printInst()
99 const MCOperand &MO2 = MI->getOperand(2); in printInst()
100 const MCOperand &MO3 = MI->getOperand(3); in printInst()
120 const MCOperand &Dst = MI->getOperand(0); in printInst()
121 const MCOperand &MO1 = MI->getOperand(1); in printInst()
122 const MCOperand &MO2 = MI->getOperand(2); in printInst()
148 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
162 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
163 MI->getOperand(3).getImm() == -4) { in printInst()
167 printRegName(O, MI->getOperand(1).getReg()); in printInst()
177 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
191 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
192 MI->getOperand(4).getImm() == 4) { in printInst()
196 printRegName(O, MI->getOperand(0).getReg()); in printInst()
206 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
219 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
231 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
233 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
262 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
269 NewMI.addOperand(MI->getOperand(0)); in printInst()
276 NewMI.addOperand(MI->getOperand(i)); in printInst()
287 switch (MI->getOperand(0).getImm()) { in printInst()
311 const MCOperand &Op = MI->getOperand(OpNo); in printOperand()
352 const MCOperand &Op = MI->getOperand(OpNum); in printOperand()
366 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
397 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
398 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
399 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
417 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
418 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
434 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp()
435 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM2PreOrOffsetIndexOp()
436 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM2PreOrOffsetIndexOp()
465 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBB()
466 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBB()
479 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBH()
480 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBH()
494 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode2Operand()
502 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAddrMode2Operand()
514 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode2OffsetOperand()
515 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand()
539 const MCOperand &MO1 = MI->getOperand(Op); in printAM3PreOrOffsetIndexOp()
540 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM3PreOrOffsetIndexOp()
541 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM3PreOrOffsetIndexOp()
569 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode3Operand()
575 assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) != in printAddrMode3Operand()
585 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode3OffsetOperand()
586 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand()
603 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8Operand()
612 const MCOperand &MO1 = MI->getOperand(OpNum); in printPostIdxRegOperand()
613 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand()
622 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8s4Operand()
632 const MCOperand &MO1 = MI->getOperand(OpNum); in printMveAddrModeRQOperand()
633 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printMveAddrModeRQOperand()
651 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm()); in printLdStmModeOperand()
659 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5Operand()
660 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand()
685 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5FP16Operand()
686 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand()
711 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode6Operand()
712 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand()
726 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode7Operand()
737 const MCOperand &MO = MI->getOperand(OpNum); in printAddrMode6OffsetOperand()
750 const MCOperand &MO = MI->getOperand(OpNum); in printBitfieldInvMaskImmOperand()
763 unsigned val = MI->getOperand(OpNum).getImm(); in printMemBOption()
770 unsigned val = MI->getOperand(OpNum).getImm(); in printInstSyncBOption()
777 unsigned val = MI->getOperand(OpNum).getImm(); in printTraceSyncBOption()
784 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand()
799 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm()
810 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm()
834 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
842 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
851 const MCOperand &Op = MI->getOperand(OpNum); in printSetendOperand()
860 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIMod()
866 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIFlag()
879 const MCOperand &Op = MI->getOperand(OpNum); in printMSRMaskOperand()
961 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand()
975 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printPredicateOperand()
986 if ((ARMCC::CondCodes)MI->getOperand(OpNum).getImm() == ARMCC::HS) in printMandatoryRestrictedPredicateOperand()
996 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryPredicateOperand()
1004 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryInvertedPredicateOperand()
1011 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
1012 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1021 O << MI->getOperand(OpNum).getImm(); in printNoHashImmediate()
1027 O << "p" << MI->getOperand(OpNum).getImm(); in printPImmediate()
1033 O << "c" << MI->getOperand(OpNum).getImm(); in printCImmediate()
1039 O << "{" << MI->getOperand(OpNum).getImm() << "}"; in printCoprocOptionImm()
1051 const MCOperand &MO = MI->getOperand(OpNum); in printAdrLabelOperand()
1073 << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4); in printThumbS4ImmOperand()
1079 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm()
1087 unsigned Mask = MI->getOperand(OpNum).getImm(); in printThumbITMask()
1101 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeRROperand()
1102 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeRROperand()
1124 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeImm5SOperand()
1125 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeImm5SOperand()
1176 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2SOOperand()
1177 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand()
1192 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrModeImm12Operand()
1193 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand()
1224 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8Operand()
1225 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand()
1251 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4Operand()
1252 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand()
1284 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm0_1020s4Operand()
1285 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand()
1300 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8OffsetOperand()
1315 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4OffsetOperand()
1334 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeSoRegOperand()
1335 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand()
1336 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printT2AddrModeSoRegOperand()
1358 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1365 unsigned EncodedImm = MI->getOperand(OpNum).getImm(); in printVMOVModImmOperand()
1377 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand()
1384 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand()
1395 MCOperand Op = MI->getOperand(OpNum); in printModImmOperand()
1408 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1436 markup(O, Markup::Immediate) << "#" << 16 - MI->getOperand(OpNum).getImm(); in printFBits16()
1441 markup(O, Markup::Immediate) << "#" << 32 - MI->getOperand(OpNum).getImm(); in printFBits32()
1447 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1454 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1461 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1474 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1491 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1493 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1495 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1506 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1508 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1510 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1512 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1521 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1529 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1547 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1549 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1551 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1563 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1565 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1567 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1569 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1576 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1593 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1595 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1597 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1608 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1610 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1612 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1614 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1626 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1628 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1630 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1641 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1643 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1645 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1647 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1655 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()
1669 unsigned Val = MI->getOperand(OpNo).getImm(); in printComplexRotationOp()
1676 ARMVCC::VPTCodes CC = (ARMVCC::VPTCodes)MI->getOperand(OpNum).getImm(); in printVPTPredicateOperand()
1685 unsigned Mask = MI->getOperand(OpNum).getImm(); in printVPTMask()
1700 uint32_t Val = MI->getOperand(OpNum).getImm(); in printMveSaturateOp()