Lines Matching refs:OpNum

350                                   unsigned OpNum, const MCSubtargetInfo &STI,  in printOperand()  argument
352 const MCOperand &Op = MI->getOperand(OpNum); in printOperand()
354 return printOperand(MI, OpNum, STI, O); in printOperand()
363 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, in printThumbLdrLabelOperand() argument
366 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
394 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, in printSORegRegOperand() argument
397 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
398 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
399 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
414 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, in printSORegImmOperand() argument
417 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
418 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
511 unsigned OpNum, in printAddrMode2OffsetOperand() argument
514 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode2OffsetOperand()
515 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand()
582 unsigned OpNum, in printAddrMode3OffsetOperand() argument
585 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode3OffsetOperand()
586 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand()
600 void ARMInstPrinter::printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum, in printPostIdxImm8Operand() argument
603 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8Operand()
609 void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, in printPostIdxRegOperand() argument
612 const MCOperand &MO1 = MI->getOperand(OpNum); in printPostIdxRegOperand()
613 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand()
619 void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum, in printPostIdxImm8s4Operand() argument
622 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8s4Operand()
629 void ARMInstPrinter::printMveAddrModeRQOperand(const MCInst *MI, unsigned OpNum, in printMveAddrModeRQOperand() argument
632 const MCOperand &MO1 = MI->getOperand(OpNum); in printMveAddrModeRQOperand()
633 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printMveAddrModeRQOperand()
647 void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum, in printLdStmModeOperand() argument
651 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm()); in printLdStmModeOperand()
656 void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum, in printAddrMode5Operand() argument
659 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5Operand()
660 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand()
663 printOperand(MI, OpNum, STI, O); in printAddrMode5Operand()
682 void ARMInstPrinter::printAddrMode5FP16Operand(const MCInst *MI, unsigned OpNum, in printAddrMode5FP16Operand() argument
685 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5FP16Operand()
686 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand()
689 printOperand(MI, OpNum, STI, O); in printAddrMode5FP16Operand()
708 void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum, in printAddrMode6Operand() argument
711 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode6Operand()
712 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand()
723 void ARMInstPrinter::printAddrMode7Operand(const MCInst *MI, unsigned OpNum, in printAddrMode7Operand() argument
726 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode7Operand()
734 unsigned OpNum, in printAddrMode6OffsetOperand() argument
737 const MCOperand &MO = MI->getOperand(OpNum); in printAddrMode6OffsetOperand()
747 unsigned OpNum, in printBitfieldInvMaskImmOperand() argument
750 const MCOperand &MO = MI->getOperand(OpNum); in printBitfieldInvMaskImmOperand()
760 void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum, in printMemBOption() argument
763 unsigned val = MI->getOperand(OpNum).getImm(); in printMemBOption()
767 void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum, in printInstSyncBOption() argument
770 unsigned val = MI->getOperand(OpNum).getImm(); in printInstSyncBOption()
774 void ARMInstPrinter::printTraceSyncBOption(const MCInst *MI, unsigned OpNum, in printTraceSyncBOption() argument
777 unsigned val = MI->getOperand(OpNum).getImm(); in printTraceSyncBOption()
781 void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum, in printShiftImmOperand() argument
784 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand()
796 void ARMInstPrinter::printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum, in printPKHLSLShiftImm() argument
799 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm()
807 void ARMInstPrinter::printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, in printPKHASRShiftImm() argument
810 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm()
819 void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum, in printRegisterList() argument
823 assert(is_sorted(drop_begin(*MI, OpNum), in printRegisterList()
831 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) { in printRegisterList()
832 if (i != OpNum) in printRegisterList()
839 void ARMInstPrinter::printGPRPairOperand(const MCInst *MI, unsigned OpNum, in printGPRPairOperand() argument
842 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
848 void ARMInstPrinter::printSetendOperand(const MCInst *MI, unsigned OpNum, in printSetendOperand() argument
851 const MCOperand &Op = MI->getOperand(OpNum); in printSetendOperand()
858 void ARMInstPrinter::printCPSIMod(const MCInst *MI, unsigned OpNum, in printCPSIMod() argument
860 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIMod()
864 void ARMInstPrinter::printCPSIFlag(const MCInst *MI, unsigned OpNum, in printCPSIFlag() argument
866 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIFlag()
876 void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum, in printMSRMaskOperand() argument
879 const MCOperand &Op = MI->getOperand(OpNum); in printMSRMaskOperand()
958 void ARMInstPrinter::printBankedRegOperand(const MCInst *MI, unsigned OpNum, in printBankedRegOperand() argument
961 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand()
972 void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, in printPredicateOperand() argument
975 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printPredicateOperand()
984 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printMandatoryRestrictedPredicateOperand() argument
986 if ((ARMCC::CondCodes)MI->getOperand(OpNum).getImm() == ARMCC::HS) in printMandatoryRestrictedPredicateOperand()
989 printMandatoryPredicateOperand(MI, OpNum, STI, O); in printMandatoryRestrictedPredicateOperand()
993 unsigned OpNum, in printMandatoryPredicateOperand() argument
996 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryPredicateOperand()
1001 unsigned OpNum, in printMandatoryInvertedPredicateOperand() argument
1004 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryInvertedPredicateOperand()
1008 void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum, in printSBitModifierOperand() argument
1011 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
1012 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1018 void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum, in printNoHashImmediate() argument
1021 O << MI->getOperand(OpNum).getImm(); in printNoHashImmediate()
1024 void ARMInstPrinter::printPImmediate(const MCInst *MI, unsigned OpNum, in printPImmediate() argument
1027 O << "p" << MI->getOperand(OpNum).getImm(); in printPImmediate()
1030 void ARMInstPrinter::printCImmediate(const MCInst *MI, unsigned OpNum, in printCImmediate() argument
1033 O << "c" << MI->getOperand(OpNum).getImm(); in printCImmediate()
1036 void ARMInstPrinter::printCoprocOptionImm(const MCInst *MI, unsigned OpNum, in printCoprocOptionImm() argument
1039 O << "{" << MI->getOperand(OpNum).getImm() << "}"; in printCoprocOptionImm()
1042 void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum, in printPCLabel() argument
1048 void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum, in printAdrLabelOperand() argument
1051 const MCOperand &MO = MI->getOperand(OpNum); in printAdrLabelOperand()
1069 void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, in printThumbS4ImmOperand() argument
1073 << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4); in printThumbS4ImmOperand()
1076 void ARMInstPrinter::printThumbSRImm(const MCInst *MI, unsigned OpNum, in printThumbSRImm() argument
1079 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm()
1083 void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum, in printThumbITMask() argument
1087 unsigned Mask = MI->getOperand(OpNum).getImm(); in printThumbITMask()
1173 void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum, in printT2SOOperand() argument
1176 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2SOOperand()
1177 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand()
1189 void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, in printAddrModeImm12Operand() argument
1192 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrModeImm12Operand()
1193 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand()
1196 printOperand(MI, OpNum, STI, O); in printAddrModeImm12Operand()
1221 unsigned OpNum, in printT2AddrModeImm8Operand() argument
1224 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8Operand()
1225 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand()
1248 unsigned OpNum, in printT2AddrModeImm8s4Operand() argument
1251 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4Operand()
1252 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand()
1255 printOperand(MI, OpNum, STI, O); in printT2AddrModeImm8s4Operand()
1282 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printT2AddrModeImm0_1020s4Operand() argument
1284 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm0_1020s4Operand()
1285 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand()
1298 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printT2AddrModeImm8OffsetOperand() argument
1300 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8OffsetOperand()
1313 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printT2AddrModeImm8s4OffsetOperand() argument
1315 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4OffsetOperand()
1331 unsigned OpNum, in printT2AddrModeSoRegOperand() argument
1334 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeSoRegOperand()
1335 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand()
1336 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printT2AddrModeSoRegOperand()
1355 void ARMInstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum, in printFPImmOperand() argument
1358 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1362 void ARMInstPrinter::printVMOVModImmOperand(const MCInst *MI, unsigned OpNum, in printVMOVModImmOperand() argument
1365 unsigned EncodedImm = MI->getOperand(OpNum).getImm(); in printVMOVModImmOperand()
1374 void ARMInstPrinter::printImmPlusOneOperand(const MCInst *MI, unsigned OpNum, in printImmPlusOneOperand() argument
1377 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand()
1381 void ARMInstPrinter::printRotImmOperand(const MCInst *MI, unsigned OpNum, in printRotImmOperand() argument
1384 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand()
1392 void ARMInstPrinter::printModImmOperand(const MCInst *MI, unsigned OpNum, in printModImmOperand() argument
1395 MCOperand Op = MI->getOperand(OpNum); in printModImmOperand()
1399 return printOperand(MI, OpNum, STI, O); in printModImmOperand()
1408 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1434 void ARMInstPrinter::printFBits16(const MCInst *MI, unsigned OpNum, in printFBits16() argument
1436 markup(O, Markup::Immediate) << "#" << 16 - MI->getOperand(OpNum).getImm(); in printFBits16()
1439 void ARMInstPrinter::printFBits32(const MCInst *MI, unsigned OpNum, in printFBits32() argument
1441 markup(O, Markup::Immediate) << "#" << 32 - MI->getOperand(OpNum).getImm(); in printFBits32()
1444 void ARMInstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum, in printVectorIndex() argument
1447 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1450 void ARMInstPrinter::printVectorListOne(const MCInst *MI, unsigned OpNum, in printVectorListOne() argument
1454 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1458 void ARMInstPrinter::printVectorListTwo(const MCInst *MI, unsigned OpNum, in printVectorListTwo() argument
1461 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1471 void ARMInstPrinter::printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum, in printVectorListTwoSpaced() argument
1474 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1484 void ARMInstPrinter::printVectorListThree(const MCInst *MI, unsigned OpNum, in printVectorListThree() argument
1491 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1493 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1495 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1499 void ARMInstPrinter::printVectorListFour(const MCInst *MI, unsigned OpNum, in printVectorListFour() argument
1506 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1508 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1510 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1512 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1517 unsigned OpNum, in printVectorListOneAllLanes() argument
1521 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1526 unsigned OpNum, in printVectorListTwoAllLanes() argument
1529 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1540 unsigned OpNum, in printVectorListThreeAllLanes() argument
1547 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1549 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1551 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1556 unsigned OpNum, in printVectorListFourAllLanes() argument
1563 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1565 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1567 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1569 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1574 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printVectorListTwoSpacedAllLanes() argument
1576 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1587 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printVectorListThreeSpacedAllLanes() argument
1593 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1595 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1597 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1602 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printVectorListFourSpacedAllLanes() argument
1608 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1610 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1612 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1614 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1619 unsigned OpNum, in printVectorListThreeSpaced() argument
1626 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1628 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1630 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1634 void ARMInstPrinter::printVectorListFourSpaced(const MCInst *MI, unsigned OpNum, in printVectorListFourSpaced() argument
1641 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1643 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1645 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1647 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1652 void ARMInstPrinter::printMVEVectorList(const MCInst *MI, unsigned OpNum, in printMVEVectorList() argument
1655 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()
1673 void ARMInstPrinter::printVPTPredicateOperand(const MCInst *MI, unsigned OpNum, in printVPTPredicateOperand() argument
1676 ARMVCC::VPTCodes CC = (ARMVCC::VPTCodes)MI->getOperand(OpNum).getImm(); in printVPTPredicateOperand()
1681 void ARMInstPrinter::printVPTMask(const MCInst *MI, unsigned OpNum, in printVPTMask() argument
1685 unsigned Mask = MI->getOperand(OpNum).getImm(); in printVPTMask()
1697 void ARMInstPrinter::printMveSaturateOp(const MCInst *MI, unsigned OpNum, in printMveSaturateOp() argument
1700 uint32_t Val = MI->getOperand(OpNum).getImm(); in printMveSaturateOp()