176 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
179 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo,
182 static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo,
185 static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo,
189 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo,
192 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo,
195 static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo,
199 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
201 static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo,
205 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
207 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,
210 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo,
213 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,
216 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo,
220 DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
222 static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo,
225 static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo,
228 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo,
231 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo,
234 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
237 static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
240 static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo,
243 static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo,
246 static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo,
249 static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo,
252 static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo,
255 static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo,
259 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
262 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,
265 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,
268 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,
271 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
274 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
278 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
281 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
285 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
287 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
290 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
293 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
296 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
299 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
304 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
307 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
310 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
313 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
316 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,
319 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
322 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
325 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
328 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
331 static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn,
334 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,
337 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,
340 static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val,
343 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,
346 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
349 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
352 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
355 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Val,
358 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Val,
361 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Val,
364 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Val,
367 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val,
370 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val,
373 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val,
376 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Val,
379 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Val,
382 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Val,
385 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Val,
388 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Val,
391 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,
394 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Val,
397 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,
400 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,
403 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,
406 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,
409 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
412 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
415 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,
419 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
422 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
425 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
428 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
431 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn, uint64_t Address,
433 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn,
436 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
439 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
442 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
445 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
448 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
451 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
454 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
456 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
458 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
460 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
462 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
464 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
466 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
468 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
470 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,
472 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,
474 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,
476 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,
478 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,
480 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Insn,
484 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Val, uint64_t Address,
487 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
490 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
493 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
496 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,
499 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,
502 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,
505 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,
508 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,
511 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,
514 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Val,
517 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
520 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
523 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,
525 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
528 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address,
530 static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address,
532 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,
535 static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val,
538 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val,
541 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address,
544 static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address,
546 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,
550 static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val,
554 static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val,
557 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Val,
560 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
563 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
566 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
569 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
572 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,
575 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Val,
578 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Val,
581 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address,
583 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
586 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,
589 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Val, uint64_t Address,
591 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
594 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
597 static DecodeStatus DecodeT2Adr(MCInst &Inst, unsigned Val, uint64_t Address,
599 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Val,
602 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, unsigned Val,
606 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address,
608 static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val,
611 static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,
616 static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned val,
619 static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned val,
622 static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val,
625 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
627 static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val,
630 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,
632 static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val,
635 static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned Val,
638 static DecodeStatus DecodeVpredNOperand(MCInst &Inst, unsigned Val,
642 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
645 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
648 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
651 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
654 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Insn,
658 static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val,
662 static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val,
666 static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val,
670 static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val,
675 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address,
677 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,
680 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,
683 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,
686 typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val,
690 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,
692 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,
694 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,
698 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,
700 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
1293 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeGPRRegisterClass()  argument
1300   Inst.addOperand(MCOperand::createReg(Register));  in DecodeGPRRegisterClass()
1304 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeCLRMGPRRegisterClass()  argument
1314   Inst.addOperand(MCOperand::createReg(Register));  in DecodeCLRMGPRRegisterClass()
1318 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeGPRnopcRegisterClass()  argument
1326   Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder));  in DecodeGPRnopcRegisterClass()
1331 static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeGPRnospRegisterClass()  argument
1339   Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder));  in DecodeGPRnospRegisterClass()
1345 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,  in DecodeGPRwithAPSRRegisterClass()  argument
1351     Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV));  in DecodeGPRwithAPSRRegisterClass()
1355   Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder));  in DecodeGPRwithAPSRRegisterClass()
1360 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,  in DecodeGPRwithZRRegisterClass()  argument
1366     Inst.addOperand(MCOperand::createReg(ARM::ZR));  in DecodeGPRwithZRRegisterClass()
1373   Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder));  in DecodeGPRwithZRRegisterClass()
1378 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,  in DecodeGPRwithZRnospRegisterClass()  argument
1383   Check(S, DecodeGPRwithZRRegisterClass(Inst, RegNo, Address, Decoder));  in DecodeGPRwithZRnospRegisterClass()
1387 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodetGPRRegisterClass()  argument
1392   return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder);  in DecodetGPRRegisterClass()
1400 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeGPRPairRegisterClass()  argument
1414   Inst.addOperand(MCOperand::createReg(RegisterPair));  in DecodeGPRPairRegisterClass()
1419 DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,  in DecodeGPRPairnospRegisterClass()  argument
1425   Inst.addOperand(MCOperand::createReg(RegisterPair));  in DecodeGPRPairnospRegisterClass()
1432 static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeGPRspRegisterClass()  argument
1439   Inst.addOperand(MCOperand::createReg(Register));  in DecodeGPRspRegisterClass()
1443 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodetcGPRRegisterClass()  argument
1470   Inst.addOperand(MCOperand::createReg(Register));  in DecodetcGPRRegisterClass()
1474 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecoderGPRRegisterClass()  argument
1485   Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder));  in DecoderGPRRegisterClass()
1500 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeSPRRegisterClass()  argument
1507   Inst.addOperand(MCOperand::createReg(Register));  in DecodeSPRRegisterClass()
1511 static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeHPRRegisterClass()  argument
1514   return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder);  in DecodeHPRRegisterClass()
1528 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeDPRRegisterClass()  argument
1540   Inst.addOperand(MCOperand::createReg(Register));  in DecodeDPRRegisterClass()
1544 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeDPR_8RegisterClass()  argument
1549   return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder);  in DecodeDPR_8RegisterClass()
1552 static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeSPR_8RegisterClass()  argument
1557   return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder);  in DecodeSPR_8RegisterClass()
1560 static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeDPR_VFP2RegisterClass()  argument
1565   return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder);  in DecodeDPR_VFP2RegisterClass()
1575 static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeQPRRegisterClass()  argument
1583   Inst.addOperand(MCOperand::createReg(Register));  in DecodeQPRRegisterClass()
1596 static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeDPairRegisterClass()  argument
1603   Inst.addOperand(MCOperand::createReg(Register));  in DecodeDPairRegisterClass()
1619 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,  in DecodeDPairSpacedRegisterClass()  argument
1625   Inst.addOperand(MCOperand::createReg(Register));  in DecodeDPairSpacedRegisterClass()
1629 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,  in DecodePredicateOperand()  argument
1635   if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)  in DecodePredicateOperand()
1639   if (Val != ARMCC::AL && !MCII->get(Inst.getOpcode()).isPredicable())  in DecodePredicateOperand()
1641   Inst.addOperand(MCOperand::createImm(Val));  in DecodePredicateOperand()
1643     Inst.addOperand(MCOperand::createReg(0));  in DecodePredicateOperand()
1645     Inst.addOperand(MCOperand::createReg(ARM::CPSR));  in DecodePredicateOperand()
1649 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,  in DecodeCCOutOperand()  argument
1653     Inst.addOperand(MCOperand::createReg(ARM::CPSR));  in DecodeCCOutOperand()
1655     Inst.addOperand(MCOperand::createReg(0));  in DecodeCCOutOperand()
1659 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Val,  in DecodeSORegImmOperand()  argument
1669   if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeSORegImmOperand()
1692   Inst.addOperand(MCOperand::createImm(Op));  in DecodeSORegImmOperand()
1697 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Val,  in DecodeSORegRegOperand()  argument
1707   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeSORegRegOperand()
1709   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rs, Address, Decoder)))  in DecodeSORegRegOperand()
1728   Inst.addOperand(MCOperand::createImm(Shift));  in DecodeSORegRegOperand()
1733 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,  in DecodeRegListOperand()  argument
1741   switch (Inst.getOpcode()) {  in DecodeRegListOperand()
1753     WritebackReg = Inst.getOperand(0).getReg();  in DecodeRegListOperand()
1765         if (!Check(S, DecodeCLRMGPRRegisterClass(Inst, i, Address, Decoder))) {  in DecodeRegListOperand()
1769         if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder)))  in DecodeRegListOperand()
1772         if (NeedDisjointWriteback && WritebackReg == Inst.end()[-1].getReg())  in DecodeRegListOperand()
1781 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,  in DecodeSPRRegListOperand()  argument
1796   if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeSPRRegListOperand()
1799     if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder)))  in DecodeSPRRegListOperand()
1806 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,  in DecodeDPRRegListOperand()  argument
1822   if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeDPRRegListOperand()
1825     if (!Check(S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder)))  in DecodeDPRRegListOperand()
1832 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val,  in DecodeBitfieldMaskOperand()  argument
1856   Inst.addOperand(MCOperand::createImm(~(msb_mask ^ lsb_mask)));  in DecodeBitfieldMaskOperand()
1860 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,  in DecodeCopMemInstruction()  argument
1874   switch (Inst.getOpcode()) {  in DecodeCopMemInstruction()
1946   Inst.addOperand(MCOperand::createImm(coproc));  in DecodeCopMemInstruction()
1947   Inst.addOperand(MCOperand::createImm(CRd));  in DecodeCopMemInstruction()
1948   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeCopMemInstruction()
1951   switch (Inst.getOpcode()) {  in DecodeCopMemInstruction()
1985       Inst.addOperand(MCOperand::createImm(imm));  in DecodeCopMemInstruction()
2008       Inst.addOperand(MCOperand::createImm(imm));  in DecodeCopMemInstruction()
2012   switch (Inst.getOpcode()) {  in DecodeCopMemInstruction()
2029       if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeCopMemInstruction()
2040 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeAddrMode2IdxInstruction()  argument
2054   switch (Inst.getOpcode()) {  in DecodeAddrMode2IdxInstruction()
2063       if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode2IdxInstruction()
2070   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeAddrMode2IdxInstruction()
2074   switch (Inst.getOpcode()) {  in DecodeAddrMode2IdxInstruction()
2083       if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode2IdxInstruction()
2090   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode2IdxInstruction()
2108     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeAddrMode2IdxInstruction()
2132     Inst.addOperand(MCOperand::createImm(imm));  in DecodeAddrMode2IdxInstruction()
2134     Inst.addOperand(MCOperand::createReg(0));  in DecodeAddrMode2IdxInstruction()
2136     Inst.addOperand(MCOperand::createImm(tmp));  in DecodeAddrMode2IdxInstruction()
2139   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeAddrMode2IdxInstruction()
2145 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Val,  in DecodeSORegMemOperand()  argument
2175   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeSORegMemOperand()
2177   if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeSORegMemOperand()
2184   Inst.addOperand(MCOperand::createImm(shift));  in DecodeSORegMemOperand()
2189 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,  in DecodeTSBInstruction()  argument
2192   if (Inst.getOpcode() != ARM::TSB && Inst.getOpcode() != ARM::t2TSB)  in DecodeTSBInstruction()
2198   Inst.addOperand(MCOperand::createImm(ARM_TSB::CSYNC));  in DecodeTSBInstruction()
2202 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,  in DecodeAddrMode3Instruction()  argument
2221   switch (Inst.getOpcode()) {  in DecodeAddrMode3Instruction()
2233   switch (Inst.getOpcode()) {  in DecodeAddrMode3Instruction()
2320     switch (Inst.getOpcode()) {  in DecodeAddrMode3Instruction()
2327       if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode3Instruction()
2335   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeAddrMode3Instruction()
2337   switch (Inst.getOpcode()) {  in DecodeAddrMode3Instruction()
2344       if (!Check(S, DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder)))  in DecodeAddrMode3Instruction()
2353     switch (Inst.getOpcode()) {  in DecodeAddrMode3Instruction()
2368       if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode3Instruction()
2376   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode3Instruction()
2380     Inst.addOperand(MCOperand::createReg(0));  in DecodeAddrMode3Instruction()
2381     Inst.addOperand(MCOperand::createImm(U | (imm << 4) | Rm));  in DecodeAddrMode3Instruction()
2383     if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeAddrMode3Instruction()
2385     Inst.addOperand(MCOperand::createImm(U));  in DecodeAddrMode3Instruction()
2388   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeAddrMode3Instruction()
2394 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn,  in DecodeRFEInstruction()  argument
2417   Inst.addOperand(MCOperand::createImm(mode));  in DecodeRFEInstruction()
2418   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeRFEInstruction()
2424 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,  in DecodeQADDInstruction()  argument
2435     return DecodeCPSInstruction(Inst, Insn, Address, Decoder);  in DecodeQADDInstruction()
2437   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeQADDInstruction()
2439   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeQADDInstruction()
2441   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeQADDInstruction()
2443   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeQADDInstruction()
2449 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,  in DecodeMemMultipleWritebackInstruction()  argument
2460     switch (Inst.getOpcode()) {  in DecodeMemMultipleWritebackInstruction()
2462         Inst.setOpcode(ARM::RFEDA);  in DecodeMemMultipleWritebackInstruction()
2465         Inst.setOpcode(ARM::RFEDA_UPD);  in DecodeMemMultipleWritebackInstruction()
2468         Inst.setOpcode(ARM::RFEDB);  in DecodeMemMultipleWritebackInstruction()
2471         Inst.setOpcode(ARM::RFEDB_UPD);  in DecodeMemMultipleWritebackInstruction()
2474         Inst.setOpcode(ARM::RFEIA);  in DecodeMemMultipleWritebackInstruction()
2477         Inst.setOpcode(ARM::RFEIA_UPD);  in DecodeMemMultipleWritebackInstruction()
2480         Inst.setOpcode(ARM::RFEIB);  in DecodeMemMultipleWritebackInstruction()
2483         Inst.setOpcode(ARM::RFEIB_UPD);  in DecodeMemMultipleWritebackInstruction()
2486         Inst.setOpcode(ARM::SRSDA);  in DecodeMemMultipleWritebackInstruction()
2489         Inst.setOpcode(ARM::SRSDA_UPD);  in DecodeMemMultipleWritebackInstruction()
2492         Inst.setOpcode(ARM::SRSDB);  in DecodeMemMultipleWritebackInstruction()
2495         Inst.setOpcode(ARM::SRSDB_UPD);  in DecodeMemMultipleWritebackInstruction()
2498         Inst.setOpcode(ARM::SRSIA);  in DecodeMemMultipleWritebackInstruction()
2501         Inst.setOpcode(ARM::SRSIA_UPD);  in DecodeMemMultipleWritebackInstruction()
2504         Inst.setOpcode(ARM::SRSIB);  in DecodeMemMultipleWritebackInstruction()
2507         Inst.setOpcode(ARM::SRSIB_UPD);  in DecodeMemMultipleWritebackInstruction()
2520       Inst.addOperand(  in DecodeMemMultipleWritebackInstruction()
2525     return DecodeRFEInstruction(Inst, Insn, Address, Decoder);  in DecodeMemMultipleWritebackInstruction()
2528   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeMemMultipleWritebackInstruction()
2530   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeMemMultipleWritebackInstruction()
2532   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeMemMultipleWritebackInstruction()
2534   if (!Check(S, DecodeRegListOperand(Inst, reglist, Address, Decoder)))  in DecodeMemMultipleWritebackInstruction()
2541 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,  in DecodeHINTInstruction()  argument
2551   Inst.addOperand(MCOperand::createImm(imm8));  in DecodeHINTInstruction()
2553   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeHINTInstruction()
2564 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,  in DecodeCPSInstruction()  argument
2589     Inst.setOpcode(ARM::CPS3p);  in DecodeCPSInstruction()
2590     Inst.addOperand(MCOperand::createImm(imod));  in DecodeCPSInstruction()
2591     Inst.addOperand(MCOperand::createImm(iflags));  in DecodeCPSInstruction()
2592     Inst.addOperand(MCOperand::createImm(mode));  in DecodeCPSInstruction()
2594     Inst.setOpcode(ARM::CPS2p);  in DecodeCPSInstruction()
2595     Inst.addOperand(MCOperand::createImm(imod));  in DecodeCPSInstruction()
2596     Inst.addOperand(MCOperand::createImm(iflags));  in DecodeCPSInstruction()
2599     Inst.setOpcode(ARM::CPS1p);  in DecodeCPSInstruction()
2600     Inst.addOperand(MCOperand::createImm(mode));  in DecodeCPSInstruction()
2604     Inst.setOpcode(ARM::CPS1p);  in DecodeCPSInstruction()
2605     Inst.addOperand(MCOperand::createImm(mode));  in DecodeCPSInstruction()
2612 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,  in DecodeT2CPSInstruction()  argument
2630     Inst.setOpcode(ARM::t2CPS3p);  in DecodeT2CPSInstruction()
2631     Inst.addOperand(MCOperand::createImm(imod));  in DecodeT2CPSInstruction()
2632     Inst.addOperand(MCOperand::createImm(iflags));  in DecodeT2CPSInstruction()
2633     Inst.addOperand(MCOperand::createImm(mode));  in DecodeT2CPSInstruction()
2635     Inst.setOpcode(ARM::t2CPS2p);  in DecodeT2CPSInstruction()
2636     Inst.addOperand(MCOperand::createImm(imod));  in DecodeT2CPSInstruction()
2637     Inst.addOperand(MCOperand::createImm(iflags));  in DecodeT2CPSInstruction()
2640     Inst.setOpcode(ARM::t2CPS1p);  in DecodeT2CPSInstruction()
2641     Inst.addOperand(MCOperand::createImm(mode));  in DecodeT2CPSInstruction()
2648     Inst.setOpcode(ARM::t2HINT);  in DecodeT2CPSInstruction()
2649     Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2CPSInstruction()
2656 DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeT2HintSpaceInstruction()  argument
2672   Inst.setOpcode(Opcode);  in DecodeT2HintSpaceInstruction()
2674     Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2HintSpaceInstruction()
2680 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,  in DecodeT2MOVTWInstruction()  argument
2693   if (Inst.getOpcode() == ARM::t2MOVTi16)  in DecodeT2MOVTWInstruction()
2694     if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeT2MOVTWInstruction()
2696   if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeT2MOVTWInstruction()
2699   if (!tryAddingSymbolicOperand(Address, imm, false, 4, Inst, Decoder))  in DecodeT2MOVTWInstruction()
2700     Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2MOVTWInstruction()
2705 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,  in DecodeArmMOVTWInstruction()  argument
2717   if (Inst.getOpcode() == ARM::MOVTi16)  in DecodeArmMOVTWInstruction()
2718     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeArmMOVTWInstruction()
2721   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeArmMOVTWInstruction()
2724   if (!tryAddingSymbolicOperand(Address, imm, false, 4, Inst, Decoder))  in DecodeArmMOVTWInstruction()
2725     Inst.addOperand(MCOperand::createImm(imm));  in DecodeArmMOVTWInstruction()
2727   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeArmMOVTWInstruction()
2733 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,  in DecodeSMLAInstruction()  argument
2745     return DecodeCPSInstruction(Inst, Insn, Address, Decoder);  in DecodeSMLAInstruction()
2747   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeSMLAInstruction()
2749   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeSMLAInstruction()
2751   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeSMLAInstruction()
2753   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder)))  in DecodeSMLAInstruction()
2756   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeSMLAInstruction()
2762 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,  in DecodeTSTInstruction()  argument
2772     return DecodeSETPANInstruction(Inst, Insn, Address, Decoder);  in DecodeTSTInstruction()
2774   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeTSTInstruction()
2776   if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeTSTInstruction()
2778   if (!Check(S, DecodePredicateOperand(Inst, Pred, Address, Decoder)))  in DecodeTSTInstruction()
2784 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,  in DecodeSETPANInstruction()  argument
2807   Inst.setOpcode(ARM::SETPAN);  in DecodeSETPANInstruction()
2808   Inst.addOperand(MCOperand::createImm(Imm));  in DecodeSETPANInstruction()
2813 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,  in DecodeAddrModeImm12Operand()  argument
2822   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrModeImm12Operand()
2827   Inst.addOperand(MCOperand::createImm(imm));  in DecodeAddrModeImm12Operand()
2834 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,  in DecodeAddrMode5Operand()  argument
2844   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode5Operand()
2848     Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5Opc(ARM_AM::add, imm)));  in DecodeAddrMode5Operand()
2850     Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5Opc(ARM_AM::sub, imm)));  in DecodeAddrMode5Operand()
2855 static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val,  in DecodeAddrMode5FP16Operand()  argument
2865   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeAddrMode5FP16Operand()
2869     Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5FP16Opc(ARM_AM::add, imm)));  in DecodeAddrMode5FP16Operand()
2871     Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5FP16Opc(ARM_AM::sub, imm)));  in DecodeAddrMode5FP16Operand()
2876 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,  in DecodeAddrMode7Operand()  argument
2879   return DecodeGPRRegisterClass(Inst, Val, Address, Decoder);  in DecodeAddrMode7Operand()
2882 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,  in DecodeT2BInstruction()  argument
2903                                 true, 4, Inst, Decoder))  in DecodeT2BInstruction()
2904     Inst.addOperand(MCOperand::createImm(imm32));  in DecodeT2BInstruction()
2909 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,  in DecodeBranchImmInstruction()  argument
2918     Inst.setOpcode(ARM::BLXi);  in DecodeBranchImmInstruction()
2921                                   true, 4, Inst, Decoder))  in DecodeBranchImmInstruction()
2922     Inst.addOperand(MCOperand::createImm(SignExtend32<26>(imm)));  in DecodeBranchImmInstruction()
2927                                 true, 4, Inst, Decoder))  in DecodeBranchImmInstruction()
2928     Inst.addOperand(MCOperand::createImm(SignExtend32<26>(imm)));  in DecodeBranchImmInstruction()
2932   if (Inst.getOpcode() != ARM::BL)  in DecodeBranchImmInstruction()
2933     if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeBranchImmInstruction()
2939 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,  in DecodeAddrMode6Operand()  argument
2947   if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeAddrMode6Operand()
2950     Inst.addOperand(MCOperand::createImm(0));  in DecodeAddrMode6Operand()
2952     Inst.addOperand(MCOperand::createImm(4 << align));  in DecodeAddrMode6Operand()
2957 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn,  in DecodeVLDInstruction()  argument
2970   switch (Inst.getOpcode()) {  in DecodeVLDInstruction()
2980     if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLDInstruction()
2992     if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLDInstruction()
2996     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLDInstruction()
3001   switch (Inst.getOpcode()) {  in DecodeVLDInstruction()
3014       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))  in DecodeVLDInstruction()
3029       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))  in DecodeVLDInstruction()
3037   switch(Inst.getOpcode()) {  in DecodeVLDInstruction()
3050       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))  in DecodeVLDInstruction()
3065       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))  in DecodeVLDInstruction()
3073   switch (Inst.getOpcode()) {  in DecodeVLDInstruction()
3080       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))  in DecodeVLDInstruction()
3089       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))  in DecodeVLDInstruction()
3097   switch (Inst.getOpcode()) {  in DecodeVLDInstruction()
3148       Inst.addOperand(MCOperand::createImm(0));  in DecodeVLDInstruction()
3162       if (!Check(S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder)))  in DecodeVLDInstruction()
3170   if (!Check(S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder)))  in DecodeVLDInstruction()
3174   switch (Inst.getOpcode()) {  in DecodeVLDInstruction()
3183       Inst.addOperand(MCOperand::createReg(0));  in DecodeVLDInstruction()
3216         !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLDInstruction()
3234 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn,  in DecodeVLDST1Instruction()  argument
3244   return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)  in DecodeVLDST1Instruction()
3245               : DecodeVSTInstruction(Inst, Insn, Address, Decoder);  in DecodeVLDST1Instruction()
3248 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn,  in DecodeVLDST2Instruction()  argument
3260   return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)  in DecodeVLDST2Instruction()
3261               : DecodeVSTInstruction(Inst, Insn, Address, Decoder);  in DecodeVLDST2Instruction()
3264 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn,  in DecodeVLDST3Instruction()  argument
3274   return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)  in DecodeVLDST3Instruction()
3275               : DecodeVSTInstruction(Inst, Insn, Address, Decoder);  in DecodeVLDST3Instruction()
3278 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn,  in DecodeVLDST4Instruction()  argument
3285   return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder)  in DecodeVLDST4Instruction()
3286               : DecodeVSTInstruction(Inst, Insn, Address, Decoder);  in DecodeVLDST4Instruction()
3289 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn,  in DecodeVSTInstruction()  argument
3302   switch (Inst.getOpcode()) {  in DecodeVSTInstruction()
3355       Inst.addOperand(MCOperand::createImm(0));  in DecodeVSTInstruction()
3369       if (!Check(S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder)))  in DecodeVSTInstruction()
3377   if (!Check(S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder)))  in DecodeVSTInstruction()
3381   switch (Inst.getOpcode()) {  in DecodeVSTInstruction()
3384         Inst.addOperand(MCOperand::createReg(0));  in DecodeVSTInstruction()
3386         if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVSTInstruction()
3419   switch (Inst.getOpcode()) {  in DecodeVSTInstruction()
3441     if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVSTInstruction()
3453     if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVSTInstruction()
3457     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVSTInstruction()
3462   switch (Inst.getOpcode()) {  in DecodeVSTInstruction()
3475       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder)))  in DecodeVSTInstruction()
3490       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))  in DecodeVSTInstruction()
3498   switch (Inst.getOpcode()) {  in DecodeVSTInstruction()
3511       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder)))  in DecodeVSTInstruction()
3526       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder)))  in DecodeVSTInstruction()
3534   switch (Inst.getOpcode()) {  in DecodeVSTInstruction()
3541       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder)))  in DecodeVSTInstruction()
3550       if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder)))  in DecodeVSTInstruction()
3560 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn,  in DecodeVLD1DupInstruction()  argument
3576   switch (Inst.getOpcode()) {  in DecodeVLD1DupInstruction()
3581     if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD1DupInstruction()
3585     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD1DupInstruction()
3590     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD1DupInstruction()
3594   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD1DupInstruction()
3596   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD1DupInstruction()
3602       !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD1DupInstruction()
3608 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn,  in DecodeVLD2DupInstruction()  argument
3621   switch (Inst.getOpcode()) {  in DecodeVLD2DupInstruction()
3626     if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD2DupInstruction()
3633     if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD2DupInstruction()
3637     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD2DupInstruction()
3643     Inst.addOperand(MCOperand::createImm(0));  in DecodeVLD2DupInstruction()
3645   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD2DupInstruction()
3647   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD2DupInstruction()
3650     if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD2DupInstruction()
3657 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn,  in DecodeVLD3DupInstruction()  argument
3668   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD3DupInstruction()
3670   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))  in DecodeVLD3DupInstruction()
3672   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))  in DecodeVLD3DupInstruction()
3675     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD3DupInstruction()
3679   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD3DupInstruction()
3681   Inst.addOperand(MCOperand::createImm(0));  in DecodeVLD3DupInstruction()
3684     Inst.addOperand(MCOperand::createReg(0));  in DecodeVLD3DupInstruction()
3686     if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD3DupInstruction()
3693 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,  in DecodeVLD4DupInstruction()  argument
3719   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD4DupInstruction()
3721   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))  in DecodeVLD4DupInstruction()
3723   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder)))  in DecodeVLD4DupInstruction()
3725   if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder)))  in DecodeVLD4DupInstruction()
3728     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD4DupInstruction()
3732   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD4DupInstruction()
3734   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD4DupInstruction()
3737     Inst.addOperand(MCOperand::createReg(0));  in DecodeVLD4DupInstruction()
3739     if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD4DupInstruction()
3746 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn,  in DecodeVMOVModImmInstruction()  argument
3761     if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVMOVModImmInstruction()
3764     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVMOVModImmInstruction()
3768   Inst.addOperand(MCOperand::createImm(imm));  in DecodeVMOVModImmInstruction()
3770   switch (Inst.getOpcode()) {  in DecodeVMOVModImmInstruction()
3775       if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVMOVModImmInstruction()
3782       if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVMOVModImmInstruction()
3792 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn,  in DecodeMVEModImmInstruction()  argument
3806   if (cmode == 0xF && Inst.getOpcode() == ARM::MVE_VMVNimmi32)  in DecodeMVEModImmInstruction()
3809   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVEModImmInstruction()
3812   Inst.addOperand(MCOperand::createImm(imm));  in DecodeMVEModImmInstruction()
3814   Inst.addOperand(MCOperand::createImm(ARMVCC::None));  in DecodeMVEModImmInstruction()
3815   Inst.addOperand(MCOperand::createReg(0));  in DecodeMVEModImmInstruction()
3816   Inst.addOperand(MCOperand::createImm(0));  in DecodeMVEModImmInstruction()
3821 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,  in DecodeMVEVADCInstruction()  argument
3828   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVEVADCInstruction()
3830   Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV));  in DecodeMVEVADCInstruction()
3834   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qn, Address, Decoder)))  in DecodeMVEVADCInstruction()
3838   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder)))  in DecodeMVEVADCInstruction()
3841     Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV));  in DecodeMVEVADCInstruction()
3842   Inst.addOperand(MCOperand::createImm(Qd));  in DecodeMVEVADCInstruction()
3847 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn,  in DecodeVSHLMaxInstruction()  argument
3858   if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVSHLMaxInstruction()
3860   if (!Check(S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVSHLMaxInstruction()
3862   Inst.addOperand(MCOperand::createImm(8 << size));  in DecodeVSHLMaxInstruction()
3867 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,  in DecodeShiftRight8Imm()  argument
3870   Inst.addOperand(MCOperand::createImm(8 - Val));  in DecodeShiftRight8Imm()
3874 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,  in DecodeShiftRight16Imm()  argument
3877   Inst.addOperand(MCOperand::createImm(16 - Val));  in DecodeShiftRight16Imm()
3881 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,  in DecodeShiftRight32Imm()  argument
3884   Inst.addOperand(MCOperand::createImm(32 - Val));  in DecodeShiftRight32Imm()
3888 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,  in DecodeShiftRight64Imm()  argument
3891   Inst.addOperand(MCOperand::createImm(64 - Val));  in DecodeShiftRight64Imm()
3895 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,  in DecodeTBLInstruction()  argument
3908   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeTBLInstruction()
3911     if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeTBLInstruction()
3915   switch (Inst.getOpcode()) {  in DecodeTBLInstruction()
3918     if (!Check(S, DecodeDPairRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeTBLInstruction()
3922     if (!Check(S, DecodeDPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeTBLInstruction()
3926   if (!Check(S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeTBLInstruction()
3932 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,  in DecodeThumbAddSpecialReg()  argument
3940   if (!Check(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder)))  in DecodeThumbAddSpecialReg()
3943   switch(Inst.getOpcode()) {  in DecodeThumbAddSpecialReg()
3949       Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddSpecialReg()
3953   Inst.addOperand(MCOperand::createImm(imm));  in DecodeThumbAddSpecialReg()
3957 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,  in DecodeThumbBROperand()  argument
3961                                 true, 2, Inst, Decoder))  in DecodeThumbBROperand()
3962     Inst.addOperand(MCOperand::createImm(SignExtend32<12>(Val << 1)));  in DecodeThumbBROperand()
3966 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,  in DecodeT2BROperand()  argument
3970                                 true, 4, Inst, Decoder))  in DecodeT2BROperand()
3971     Inst.addOperand(MCOperand::createImm(SignExtend32<21>(Val)));  in DecodeT2BROperand()
3975 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,  in DecodeThumbCmpBROperand()  argument
3979                                 true, 2, Inst, Decoder))  in DecodeThumbCmpBROperand()
3980     Inst.addOperand(MCOperand::createImm(Val << 1));  in DecodeThumbCmpBROperand()
3984 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,  in DecodeThumbAddrModeRR()  argument
3992   if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeThumbAddrModeRR()
3994   if (!Check(S, DecodetGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeThumbAddrModeRR()
4000 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,  in DecodeThumbAddrModeIS()  argument
4008   if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeThumbAddrModeIS()
4010   Inst.addOperand(MCOperand::createImm(imm));  in DecodeThumbAddrModeIS()
4015 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,  in DecodeThumbAddrModePC()  argument
4020   Inst.addOperand(MCOperand::createImm(imm));  in DecodeThumbAddrModePC()
4026 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,  in DecodeThumbAddrModeSP()  argument
4029   Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddrModeSP()
4030   Inst.addOperand(MCOperand::createImm(Val));  in DecodeThumbAddrModeSP()
4035 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeSOReg()  argument
4045   switch (Inst.getOpcode()) {  in DecodeT2AddrModeSOReg()
4056   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeSOReg()
4058   if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeT2AddrModeSOReg()
4060   Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2AddrModeSOReg()
4065 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn,  in DecodeT2LoadShift()  argument
4080     switch (Inst.getOpcode()) {  in DecodeT2LoadShift()
4082       Inst.setOpcode(ARM::t2LDRBpci);  in DecodeT2LoadShift()
4085       Inst.setOpcode(ARM::t2LDRHpci);  in DecodeT2LoadShift()
4088       Inst.setOpcode(ARM::t2LDRSHpci);  in DecodeT2LoadShift()
4091       Inst.setOpcode(ARM::t2LDRSBpci);  in DecodeT2LoadShift()
4094       Inst.setOpcode(ARM::t2LDRpci);  in DecodeT2LoadShift()
4097       Inst.setOpcode(ARM::t2PLDpci);  in DecodeT2LoadShift()
4100       Inst.setOpcode(ARM::t2PLIpci);  in DecodeT2LoadShift()
4106     return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);  in DecodeT2LoadShift()
4110     switch (Inst.getOpcode()) {  in DecodeT2LoadShift()
4114       Inst.setOpcode(ARM::t2PLDWs);  in DecodeT2LoadShift()
4117       Inst.setOpcode(ARM::t2PLIs);  in DecodeT2LoadShift()
4124   switch (Inst.getOpcode()) {  in DecodeT2LoadShift()
4136       if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LoadShift()
4143   if (!Check(S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder)))  in DecodeT2LoadShift()
4149 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,  in DecodeT2LoadImm8()  argument
4169     switch (Inst.getOpcode()) {  in DecodeT2LoadImm8()
4171       Inst.setOpcode(ARM::t2LDRpci);  in DecodeT2LoadImm8()
4174       Inst.setOpcode(ARM::t2LDRBpci);  in DecodeT2LoadImm8()
4177       Inst.setOpcode(ARM::t2LDRSBpci);  in DecodeT2LoadImm8()
4180       Inst.setOpcode(ARM::t2LDRHpci);  in DecodeT2LoadImm8()
4183       Inst.setOpcode(ARM::t2LDRSHpci);  in DecodeT2LoadImm8()
4186       Inst.setOpcode(ARM::t2PLDpci);  in DecodeT2LoadImm8()
4189       Inst.setOpcode(ARM::t2PLIpci);  in DecodeT2LoadImm8()
4194     return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);  in DecodeT2LoadImm8()
4198     switch (Inst.getOpcode()) {  in DecodeT2LoadImm8()
4203         Inst.setOpcode(ARM::t2PLDWi8);  in DecodeT2LoadImm8()
4206       Inst.setOpcode(ARM::t2PLIi8);  in DecodeT2LoadImm8()
4213   switch (Inst.getOpcode()) {  in DecodeT2LoadImm8()
4225     if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LoadImm8()
4229   if (!Check(S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder)))  in DecodeT2LoadImm8()
4234 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,  in DecodeT2LoadImm12()  argument
4251     switch (Inst.getOpcode()) {  in DecodeT2LoadImm12()
4253       Inst.setOpcode(ARM::t2LDRpci);  in DecodeT2LoadImm12()
4256       Inst.setOpcode(ARM::t2LDRHpci);  in DecodeT2LoadImm12()
4259       Inst.setOpcode(ARM::t2LDRSHpci);  in DecodeT2LoadImm12()
4262       Inst.setOpcode(ARM::t2LDRBpci);  in DecodeT2LoadImm12()
4265       Inst.setOpcode(ARM::t2LDRSBpci);  in DecodeT2LoadImm12()
4268       Inst.setOpcode(ARM::t2PLDpci);  in DecodeT2LoadImm12()
4271       Inst.setOpcode(ARM::t2PLIpci);  in DecodeT2LoadImm12()
4276     return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);  in DecodeT2LoadImm12()
4280     switch (Inst.getOpcode()) {  in DecodeT2LoadImm12()
4284       Inst.setOpcode(ARM::t2PLDWi12);  in DecodeT2LoadImm12()
4287       Inst.setOpcode(ARM::t2PLIi12);  in DecodeT2LoadImm12()
4294   switch (Inst.getOpcode()) {  in DecodeT2LoadImm12()
4306     if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LoadImm12()
4310   if (!Check(S, DecodeT2AddrModeImm12(Inst, imm, Address, Decoder)))  in DecodeT2LoadImm12()
4315 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeT2LoadT()  argument
4325     switch (Inst.getOpcode()) {  in DecodeT2LoadT()
4327       Inst.setOpcode(ARM::t2LDRpci);  in DecodeT2LoadT()
4330       Inst.setOpcode(ARM::t2LDRBpci);  in DecodeT2LoadT()
4333       Inst.setOpcode(ARM::t2LDRHpci);  in DecodeT2LoadT()
4336       Inst.setOpcode(ARM::t2LDRSBpci);  in DecodeT2LoadT()
4339       Inst.setOpcode(ARM::t2LDRSHpci);  in DecodeT2LoadT()
4344     return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);  in DecodeT2LoadT()
4347   if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LoadT()
4349   if (!Check(S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder)))  in DecodeT2LoadT()
4354 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,  in DecodeT2LoadLabel()  argument
4369     switch (Inst.getOpcode()) {  in DecodeT2LoadLabel()
4372         Inst.setOpcode(ARM::t2PLDpci);  in DecodeT2LoadLabel()
4375         Inst.setOpcode(ARM::t2PLIpci);  in DecodeT2LoadLabel()
4384   switch(Inst.getOpcode()) {  in DecodeT2LoadLabel()
4392     if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LoadLabel()
4403   Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2LoadLabel()
4408 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeT2Imm8S4()  argument
4411     Inst.addOperand(MCOperand::createImm(INT32_MIN));  in DecodeT2Imm8S4()
4416     Inst.addOperand(MCOperand::createImm(imm * 4));  in DecodeT2Imm8S4()
4422 static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeT2Imm7S4()  argument
4425     Inst.addOperand(MCOperand::createImm(INT32_MIN));  in DecodeT2Imm7S4()
4431     Inst.addOperand(MCOperand::createImm(imm * 4));  in DecodeT2Imm7S4()
4437 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeImm8s4()  argument
4445   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm8s4()
4447   if (!Check(S, DecodeT2Imm8S4(Inst, imm, Address, Decoder)))  in DecodeT2AddrModeImm8s4()
4453 static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeImm7s4()  argument
4461   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm7s4()
4463   if (!Check(S, DecodeT2Imm7S4(Inst, imm, Address, Decoder)))  in DecodeT2AddrModeImm7s4()
4469 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeImm0_1020s4()  argument
4477   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm0_1020s4()
4480   Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2AddrModeImm0_1020s4()
4485 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeT2Imm8()  argument
4492   Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2Imm8()
4498 static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeT2Imm7()  argument
4507   Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2Imm7()
4512 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeImm8()  argument
4521   switch (Inst.getOpcode()) {  in DecodeT2AddrModeImm8()
4536   switch (Inst.getOpcode()) {  in DecodeT2AddrModeImm8()
4551   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm8()
4553   if (!Check(S, DecodeT2Imm8(Inst, imm, Address, Decoder)))  in DecodeT2AddrModeImm8()
4560 static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val,  in DecodeTAddrModeImm7()  argument
4568   if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeTAddrModeImm7()
4570   if (!Check(S, DecodeT2Imm7<shift>(Inst, imm, Address, Decoder)))  in DecodeTAddrModeImm7()
4577 static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeImm7()  argument
4585     if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm7()
4587   } else if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm7()
4589   if (!Check(S, DecodeT2Imm7<shift>(Inst, imm, Address, Decoder)))  in DecodeT2AddrModeImm7()
4595 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn,  in DecodeT2LdStPre()  argument
4608     switch (Inst.getOpcode()) {  in DecodeT2LdStPre()
4611       Inst.setOpcode(ARM::t2LDRpci);  in DecodeT2LdStPre()
4615       Inst.setOpcode(ARM::t2LDRBpci);  in DecodeT2LdStPre()
4619       Inst.setOpcode(ARM::t2LDRHpci);  in DecodeT2LdStPre()
4624         Inst.setOpcode(ARM::t2PLIpci);  in DecodeT2LdStPre()
4626         Inst.setOpcode(ARM::t2LDRSBpci);  in DecodeT2LdStPre()
4630       Inst.setOpcode(ARM::t2LDRSHpci);  in DecodeT2LdStPre()
4635     return DecodeT2LoadLabel(Inst, Insn, Address, Decoder);  in DecodeT2LdStPre()
4639     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2LdStPre()
4643   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LdStPre()
4647     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2LdStPre()
4651   if (!Check(S, DecodeT2AddrModeImm8(Inst, addr, Address, Decoder)))  in DecodeT2LdStPre()
4657 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,  in DecodeT2AddrModeImm12()  argument
4666   switch (Inst.getOpcode()) {  in DecodeT2AddrModeImm12()
4677   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2AddrModeImm12()
4679   Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2AddrModeImm12()
4684 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn,  in DecodeThumbAddSPImm()  argument
4689   Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddSPImm()
4690   Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddSPImm()
4691   Inst.addOperand(MCOperand::createImm(imm));  in DecodeThumbAddSPImm()
4696 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,  in DecodeThumbAddSPReg()  argument
4701   if (Inst.getOpcode() == ARM::tADDrSP) {  in DecodeThumbAddSPReg()
4705     if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder)))  in DecodeThumbAddSPReg()
4707     Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddSPReg()
4708     if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder)))  in DecodeThumbAddSPReg()
4710   } else if (Inst.getOpcode() == ARM::tADDspr) {  in DecodeThumbAddSPReg()
4713     Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddSPReg()
4714     Inst.addOperand(MCOperand::createReg(ARM::SP));  in DecodeThumbAddSPReg()
4715     if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeThumbAddSPReg()
4722 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,  in DecodeThumbCPS()  argument
4728   Inst.addOperand(MCOperand::createImm(imod));  in DecodeThumbCPS()
4729   Inst.addOperand(MCOperand::createImm(flags));  in DecodeThumbCPS()
4734 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,  in DecodePostIdxReg()  argument
4741   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder)))  in DecodePostIdxReg()
4743   Inst.addOperand(MCOperand::createImm(add));  in DecodePostIdxReg()
4748 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,  in DecodeMveAddrModeRQ()  argument
4755   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeMveAddrModeRQ()
4757   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder)))  in DecodeMveAddrModeRQ()
4764 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,  in DecodeMveAddrModeQ()  argument
4771   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder)))  in DecodeMveAddrModeQ()
4782   Inst.addOperand(MCOperand::createImm(imm));  in DecodeMveAddrModeQ()
4787 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val,  in DecodeThumbBLXOffset()  argument
4807                                 true, 4, Inst, Decoder))  in DecodeThumbBLXOffset()
4808     Inst.addOperand(MCOperand::createImm(imm32));  in DecodeThumbBLXOffset()
4812 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val,  in DecodeCoprocessor()  argument
4824   Inst.addOperand(MCOperand::createImm(Val));  in DecodeCoprocessor()
4828 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Insn,  in DecodeThumbTableBranch()  argument
4839   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeThumbTableBranch()
4841   if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeThumbTableBranch()
4846 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn,  in DecodeThumb2BCCInstruction()  argument
4858         Inst.setOpcode(ARM::t2DSB);  in DecodeThumb2BCCInstruction()
4861         Inst.setOpcode(ARM::t2DMB);  in DecodeThumb2BCCInstruction()
4864         Inst.setOpcode(ARM::t2ISB);  in DecodeThumb2BCCInstruction()
4869     return DecodeMemBarrierOption(Inst, imm, Address, Decoder);  in DecodeThumb2BCCInstruction()
4878   if (!Check(S, DecodeT2BROperand(Inst, brtarget, Address, Decoder)))  in DecodeThumb2BCCInstruction()
4880   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeThumb2BCCInstruction()
4889 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeT2SOImm()  argument
4897         Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2SOImm()
4900         Inst.addOperand(MCOperand::createImm((imm << 16) | imm));  in DecodeT2SOImm()
4903         Inst.addOperand(MCOperand::createImm((imm << 24) | (imm << 8)));  in DecodeT2SOImm()
4906         Inst.addOperand(MCOperand::createImm((imm << 24) | (imm << 16) |  in DecodeT2SOImm()
4914     Inst.addOperand(MCOperand::createImm(imm));  in DecodeT2SOImm()
4920 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,  in DecodeThumbBCCTargetOperand()  argument
4924                                 true, 2, Inst, Decoder))  in DecodeThumbBCCTargetOperand()
4925     Inst.addOperand(MCOperand::createImm(SignExtend32<9>(Val << 1)));  in DecodeThumbBCCTargetOperand()
4929 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,  in DecodeThumbBLTargetOperand()  argument
4948                                 true, 4, Inst, Decoder))  in DecodeThumbBLTargetOperand()
4949     Inst.addOperand(MCOperand::createImm(imm32));  in DecodeThumbBLTargetOperand()
4953 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val,  in DecodeMemBarrierOption()  argument
4959   Inst.addOperand(MCOperand::createImm(Val));  in DecodeMemBarrierOption()
4963 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val,  in DecodeInstSyncBarrierOption()  argument
4969   Inst.addOperand(MCOperand::createImm(Val));  in DecodeInstSyncBarrierOption()
4973 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeMSRMask()  argument
5045     if (Inst.getOpcode() == ARM::t2MSR_M) {  in DecodeMSRMask()
5070   Inst.addOperand(MCOperand::createImm(Val));  in DecodeMSRMask()
5074 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val,  in DecodeBankedReg()  argument
5086   Inst.addOperand(MCOperand::createImm(Val));  in DecodeBankedReg()
5090 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,  in DecodeDoubleRegLoad()  argument
5102   if (!Check(S, DecodeGPRPairRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeDoubleRegLoad()
5104   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeDoubleRegLoad()
5106   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeDoubleRegLoad()
5112 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,  in DecodeDoubleRegStore()  argument
5122   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeDoubleRegStore()
5128   if (!Check(S, DecodeGPRPairRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeDoubleRegStore()
5130   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeDoubleRegStore()
5132   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeDoubleRegStore()
5138 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,  in DecodeLDRPreImm()  argument
5152   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeLDRPreImm()
5154   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeLDRPreImm()
5156   if (!Check(S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder)))  in DecodeLDRPreImm()
5158   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeLDRPreImm()
5164 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,  in DecodeLDRPreReg()  argument
5180   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeLDRPreReg()
5182   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeLDRPreReg()
5184   if (!Check(S, DecodeSORegMemOperand(Inst, imm, Address, Decoder)))  in DecodeLDRPreReg()
5186   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeLDRPreReg()
5192 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,  in DecodeSTRPreImm()  argument
5206   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeSTRPreImm()
5208   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeSTRPreImm()
5210   if (!Check(S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder)))  in DecodeSTRPreImm()
5212   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeSTRPreImm()
5218 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,  in DecodeSTRPreReg()  argument
5232   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeSTRPreReg()
5234   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeSTRPreReg()
5236   if (!Check(S, DecodeSORegMemOperand(Inst, imm, Address, Decoder)))  in DecodeSTRPreReg()
5238   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeSTRPreReg()
5244 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVLD1LN()  argument
5287   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD1LN()
5290     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD1LN()
5293   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD1LN()
5295   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD1LN()
5298       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD1LN()
5301       Inst.addOperand(MCOperand::createReg(0));  in DecodeVLD1LN()
5304   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD1LN()
5306   Inst.addOperand(MCOperand::createImm(index));  in DecodeVLD1LN()
5311 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVST1LN()  argument
5355     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST1LN()
5358   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST1LN()
5360   Inst.addOperand(MCOperand::createImm(align));  in DecodeVST1LN()
5363       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVST1LN()
5366       Inst.addOperand(MCOperand::createReg(0));  in DecodeVST1LN()
5369   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVST1LN()
5371   Inst.addOperand(MCOperand::createImm(index));  in DecodeVST1LN()
5376 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVLD2LN()  argument
5415   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD2LN()
5417   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVLD2LN()
5420     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD2LN()
5423   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD2LN()
5425   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD2LN()
5428       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD2LN()
5431       Inst.addOperand(MCOperand::createReg(0));  in DecodeVLD2LN()
5434   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD2LN()
5436   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVLD2LN()
5438   Inst.addOperand(MCOperand::createImm(index));  in DecodeVLD2LN()
5443 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVST2LN()  argument
5483     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST2LN()
5486   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST2LN()
5488   Inst.addOperand(MCOperand::createImm(align));  in DecodeVST2LN()
5491       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVST2LN()
5494       Inst.addOperand(MCOperand::createReg(0));  in DecodeVST2LN()
5497   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVST2LN()
5499   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVST2LN()
5501   Inst.addOperand(MCOperand::createImm(index));  in DecodeVST2LN()
5506 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVLD3LN()  argument
5543   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD3LN()
5545   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVLD3LN()
5547   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))  in DecodeVLD3LN()
5551     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD3LN()
5554   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD3LN()
5556   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD3LN()
5559       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD3LN()
5562       Inst.addOperand(MCOperand::createReg(0));  in DecodeVLD3LN()
5565   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD3LN()
5567   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVLD3LN()
5569   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))  in DecodeVLD3LN()
5571   Inst.addOperand(MCOperand::createImm(index));  in DecodeVLD3LN()
5576 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVST3LN()  argument
5614     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST3LN()
5617   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST3LN()
5619   Inst.addOperand(MCOperand::createImm(align));  in DecodeVST3LN()
5622       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVST3LN()
5625       Inst.addOperand(MCOperand::createReg(0));  in DecodeVST3LN()
5628   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVST3LN()
5630   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVST3LN()
5632   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))  in DecodeVST3LN()
5634   Inst.addOperand(MCOperand::createImm(index));  in DecodeVST3LN()
5639 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVLD4LN()  argument
5683   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD4LN()
5685   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVLD4LN()
5687   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))  in DecodeVLD4LN()
5689   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))  in DecodeVLD4LN()
5693     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD4LN()
5696   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVLD4LN()
5698   Inst.addOperand(MCOperand::createImm(align));  in DecodeVLD4LN()
5701       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVLD4LN()
5704       Inst.addOperand(MCOperand::createReg(0));  in DecodeVLD4LN()
5707   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVLD4LN()
5709   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVLD4LN()
5711   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))  in DecodeVLD4LN()
5713   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))  in DecodeVLD4LN()
5715   Inst.addOperand(MCOperand::createImm(index));  in DecodeVLD4LN()
5720 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVST4LN()  argument
5765     if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST4LN()
5768   if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVST4LN()
5770   Inst.addOperand(MCOperand::createImm(align));  in DecodeVST4LN()
5773       if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeVST4LN()
5776       Inst.addOperand(MCOperand::createReg(0));  in DecodeVST4LN()
5779   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))  in DecodeVST4LN()
5781   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder)))  in DecodeVST4LN()
5783   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder)))  in DecodeVST4LN()
5785   if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder)))  in DecodeVST4LN()
5787   Inst.addOperand(MCOperand::createImm(index));  in DecodeVST4LN()
5792 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVMOVSRR()  argument
5804   if (!Check(S, DecodeSPRRegisterClass(Inst, Rm  , Address, Decoder)))  in DecodeVMOVSRR()
5806   if (!Check(S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder)))  in DecodeVMOVSRR()
5808   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt  , Address, Decoder)))  in DecodeVMOVSRR()
5810   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder)))  in DecodeVMOVSRR()
5812   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeVMOVSRR()
5818 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVMOVRRS()  argument
5830   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt  , Address, Decoder)))  in DecodeVMOVRRS()
5832   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder)))  in DecodeVMOVRRS()
5834   if (!Check(S, DecodeSPRRegisterClass(Inst, Rm  , Address, Decoder)))  in DecodeVMOVRRS()
5836   if (!Check(S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder)))  in DecodeVMOVRRS()
5838   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeVMOVRRS()
5844 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeIT()  argument
5868   Inst.addOperand(MCOperand::createImm(pred));  in DecodeIT()
5869   Inst.addOperand(MCOperand::createImm(mask));  in DecodeIT()
5873 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,  in DecodeT2LDRDPreInstruction()  argument
5895   if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2LDRDPreInstruction()
5898   if (!Check(S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder)))  in DecodeT2LDRDPreInstruction()
5901   if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2LDRDPreInstruction()
5904   if (!Check(S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder)))  in DecodeT2LDRDPreInstruction()
5910 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,  in DecodeT2STRDPreInstruction()  argument
5930   if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeT2STRDPreInstruction()
5933   if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeT2STRDPreInstruction()
5936   if (!Check(S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder)))  in DecodeT2STRDPreInstruction()
5939   if (!Check(S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder)))  in DecodeT2STRDPreInstruction()
5945 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address,  in DecodeT2Adr()  argument
5951   assert(Inst.getNumOperands() == 0 && "We should receive an empty Inst");  in DecodeT2Adr()
5952   DecodeStatus S = DecoderGPRRegisterClass(Inst, Rd, Address, Decoder);  in DecodeT2Adr()
5962       Inst.setOpcode(ARM::t2SUBri12);  in DecodeT2Adr()
5963       Inst.addOperand(MCOperand::createReg(ARM::PC));  in DecodeT2Adr()
5967   Inst.addOperand(MCOperand::createImm(Val));  in DecodeT2Adr()
5971 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val,  in DecodeT2ShifterImmOperand()  argument
5978   Inst.addOperand(MCOperand::createImm(Val));  in DecodeT2ShifterImmOperand()
5982 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeSwap()  argument
5990     return DecodeCPSInstruction(Inst, Insn, Address, Decoder);  in DecodeSwap()
5997   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeSwap()
5999   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder)))  in DecodeSwap()
6001   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeSwap()
6003   if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeSwap()
6009 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVCVTD()  argument
6029       Inst.setOpcode(ARM::VMOVv2f32);  in DecodeVCVTD()
6034           Inst.setOpcode(ARM::VMOVv1i64);  in DecodeVCVTD()
6036           Inst.setOpcode(ARM::VMOVv8i8);  in DecodeVCVTD()
6041           Inst.setOpcode(ARM::VMVNv2i32);  in DecodeVCVTD()
6043           Inst.setOpcode(ARM::VMOVv2i32);  in DecodeVCVTD()
6048           Inst.setOpcode(ARM::VMVNv2i32);  in DecodeVCVTD()
6050           Inst.setOpcode(ARM::VMOVv2i32);  in DecodeVCVTD()
6054     return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);  in DecodeVCVTD()
6059   if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeVCVTD()
6061   if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder)))  in DecodeVCVTD()
6063   Inst.addOperand(MCOperand::createImm(64 - imm));  in DecodeVCVTD()
6068 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVCVTQ()  argument
6088       Inst.setOpcode(ARM::VMOVv4f32);  in DecodeVCVTQ()
6093           Inst.setOpcode(ARM::VMOVv2i64);  in DecodeVCVTQ()
6095           Inst.setOpcode(ARM::VMOVv16i8);  in DecodeVCVTQ()
6100           Inst.setOpcode(ARM::VMVNv4i32);  in DecodeVCVTQ()
6102           Inst.setOpcode(ARM::VMOVv4i32);  in DecodeVCVTQ()
6107           Inst.setOpcode(ARM::VMVNv4i32);  in DecodeVCVTQ()
6109           Inst.setOpcode(ARM::VMOVv4i32);  in DecodeVCVTQ()
6113     return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);  in DecodeVCVTQ()
6118   if (!Check(S, DecodeQPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeVCVTQ()
6120   if (!Check(S, DecodeQPRRegisterClass(Inst, Vm, Address, Decoder)))  in DecodeVCVTQ()
6122   Inst.addOperand(MCOperand::createImm(64 - imm));  in DecodeVCVTQ()
6128 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn,  in DecodeNEONComplexLane64Instruction()  argument
6144   if (!Check(S, DestRegDecoder(Inst, Vd, Address, Decoder)))  in DecodeNEONComplexLane64Instruction()
6146   if (!Check(S, DestRegDecoder(Inst, Vd, Address, Decoder)))  in DecodeNEONComplexLane64Instruction()
6148   if (!Check(S, DestRegDecoder(Inst, Vn, Address, Decoder)))  in DecodeNEONComplexLane64Instruction()
6150   if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder)))  in DecodeNEONComplexLane64Instruction()
6154   Inst.addOperand(MCOperand::createImm(0));  in DecodeNEONComplexLane64Instruction()
6155   Inst.addOperand(MCOperand::createImm(rotate));  in DecodeNEONComplexLane64Instruction()
6160 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeLDR()  argument
6173   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeLDR()
6175   if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeLDR()
6177   if (!Check(S, DecodeAddrMode7Operand(Inst, Rn, Address, Decoder)))  in DecodeLDR()
6179   if (!Check(S, DecodePostIdxReg(Inst, Rm, Address, Decoder)))  in DecodeLDR()
6181   if (!Check(S, DecodePredicateOperand(Inst, Cond, Address, Decoder)))  in DecodeLDR()
6187 static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val,  in DecoderForMRRC2AndMCRR2()  argument
6214   if (Inst.getOpcode() == ARM::MRRC2) {  in DecoderForMRRC2AndMCRR2()
6215     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))  in DecoderForMRRC2AndMCRR2()
6217     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder)))  in DecoderForMRRC2AndMCRR2()
6220   Inst.addOperand(MCOperand::createImm(cop));  in DecoderForMRRC2AndMCRR2()
6221   Inst.addOperand(MCOperand::createImm(opc1));  in DecoderForMRRC2AndMCRR2()
6222   if (Inst.getOpcode() == ARM::MCRR2) {  in DecoderForMRRC2AndMCRR2()
6223     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)))  in DecoderForMRRC2AndMCRR2()
6225     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder)))  in DecoderForMRRC2AndMCRR2()
6228   Inst.addOperand(MCOperand::createImm(CRm));  in DecoderForMRRC2AndMCRR2()
6233 static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,  in DecodeForVMRSandVMSR()  argument
6242   switch (Inst.getOpcode()) {  in DecodeForVMRSandVMSR()
6244     Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV));  in DecodeForVMRSandVMSR()
6247     Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeForVMRSandVMSR()
6251   if (Inst.getOpcode() != ARM::FMSTAT) {  in DecodeForVMRSandVMSR()
6257       Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder));  in DecodeForVMRSandVMSR()
6259       Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder));  in DecodeForVMRSandVMSR()
6263   switch (Inst.getOpcode()) {  in DecodeForVMRSandVMSR()
6265     Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV));  in DecodeForVMRSandVMSR()
6268     Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeForVMRSandVMSR()
6273     Inst.addOperand(MCOperand::createImm(ARMCC::AL));  in DecodeForVMRSandVMSR()
6274     Inst.addOperand(MCOperand::createReg(0));  in DecodeForVMRSandVMSR()
6277     if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))  in DecodeForVMRSandVMSR()
6285 static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned Val,  in DecodeBFLabelOperand()  argument
6298   if (!tryAddingSymbolicOperand(Address, Address + DecVal + 4, true, 4, Inst,  in DecodeBFLabelOperand()
6300     Inst.addOperand(MCOperand::createImm(isNeg ? -DecVal : DecVal));  in DecodeBFLabelOperand()
6304 static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val,  in DecodeBFAfterTargetOperand()  argument
6308   uint64_t LocImm = Inst.getOperand(0).getImm();  in DecodeBFAfterTargetOperand()
6310   if (!tryAddingSymbolicOperand(Address, Address + Val + 4, true, 4, Inst,  in DecodeBFAfterTargetOperand()
6312     Inst.addOperand(MCOperand::createImm(Val));  in DecodeBFAfterTargetOperand()
6316 static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val,  in DecodePredNoALOperand()  argument
6321   Inst.addOperand(MCOperand::createImm(Val));  in DecodePredNoALOperand()
6325 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeLOLoop()  argument
6329   if (Inst.getOpcode() == ARM::MVE_LCTP)  in DecodeLOLoop()
6334   switch (Inst.getOpcode()) {  in DecodeLOLoop()
6337     Inst.addOperand(MCOperand::createReg(ARM::LR));  in DecodeLOLoop()
6338     Inst.addOperand(MCOperand::createReg(ARM::LR));  in DecodeLOLoop()
6342                    Inst, Imm, Address, Decoder)))  in DecodeLOLoop()
6350     Inst.addOperand(MCOperand::createReg(ARM::LR));  in DecodeLOLoop()
6352                DecoderGPRRegisterClass(Inst, fieldFromInstruction(Insn, 16, 4),  in DecodeLOLoop()
6355                    Inst, Imm, Address, Decoder)))  in DecodeLOLoop()
6374       Inst.setOpcode(ARM::MVE_LCTP);  in DecodeLOLoop()
6376       Inst.addOperand(MCOperand::createReg(ARM::LR));  in DecodeLOLoop()
6377       if (!Check(S, DecoderGPRRegisterClass(Inst,  in DecodeLOLoop()
6387 static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val,  in DecodeLongShiftOperand()  argument
6395   Inst.addOperand(MCOperand::createImm(Val));  in DecodeLongShiftOperand()
6400 static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodetGPROddRegisterClass()  argument
6407   Inst.addOperand(MCOperand::createReg(Register));  in DecodetGPROddRegisterClass()
6411 static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodetGPREvenRegisterClass()  argument
6418   Inst.addOperand(MCOperand::createReg(Register));  in DecodetGPREvenRegisterClass()
6423 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeGPRwithAPSR_NZCVnospRegisterClass()  argument
6427     Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV));  in DecodeGPRwithAPSR_NZCVnospRegisterClass()
6432   Inst.addOperand(MCOperand::createReg(Register));  in DecodeGPRwithAPSR_NZCVnospRegisterClass()
6440 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeVSCCLRM()  argument
6444   Inst.addOperand(MCOperand::createImm(ARMCC::AL));  in DecodeVSCCLRM()
6445   Inst.addOperand(MCOperand::createReg(0));  in DecodeVSCCLRM()
6446   if (Inst.getOpcode() == ARM::VSCCLRMD) {  in DecodeVSCCLRM()
6450     if (!Check(S, DecodeDPRRegListOperand(Inst, reglist, Address, Decoder))) {  in DecodeVSCCLRM()
6457     if (!Check(S, DecodeSPRRegListOperand(Inst, reglist, Address, Decoder))) {  in DecodeVSCCLRM()
6461   Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeVSCCLRM()
6466 static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeMQPRRegisterClass()  argument
6473   Inst.addOperand(MCOperand::createReg(Register));  in DecodeMQPRRegisterClass()
6482 static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeMQQPRRegisterClass()  argument
6489   Inst.addOperand(MCOperand::createReg(Register));  in DecodeMQQPRRegisterClass()
6498 static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo,  in DecodeMQQQQPRRegisterClass()  argument
6505   Inst.addOperand(MCOperand::createReg(Register));  in DecodeMQQQQPRRegisterClass()
6509 static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val,  in DecodeVPTMaskOperand()  argument
6535   Inst.addOperand(MCOperand::createImm(Imm));  in DecodeVPTMaskOperand()
6540 static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned RegNo,  in DecodeVpredROperand()  argument
6554 DecodeVpredNOperand(MCInst &Inst, unsigned RegNo, uint64_t Address,  in DecodeVpredNOperand()  argument
6565 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeRestrictedIPredicateOperand()  argument
6567   Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::EQ : ARMCC::NE));  in DecodeRestrictedIPredicateOperand()
6572 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeRestrictedSPredicateOperand()  argument
6589   Inst.addOperand(MCOperand::createImm(Code));  in DecodeRestrictedSPredicateOperand()
6594 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeRestrictedUPredicateOperand()  argument
6596   Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::HS : ARMCC::HI));  in DecodeRestrictedUPredicateOperand()
6601 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeRestrictedFPPredicateOperand()  argument
6627   Inst.addOperand(MCOperand::createImm(Code));  in DecodeRestrictedFPPredicateOperand()
6631 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Val,  in DecodeVCVTImmOperand()  argument
6638   switch (Inst.getOpcode()) {  in DecodeVCVTImmOperand()
6655   Inst.addOperand(MCOperand::createImm(64 - Val));  in DecodeVCVTImmOperand()
6675 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val,  in DecodeVSTRVLDR_SYSREG()  argument
6678   switch (Inst.getOpcode()) {  in DecodeVSTRVLDR_SYSREG()
6699   if (unsigned Sysreg = FixedRegForVSTRVLDR_SYSREG(Inst.getOpcode()))  in DecodeVSTRVLDR_SYSREG()
6700     Inst.addOperand(MCOperand::createReg(Sysreg));  in DecodeVSTRVLDR_SYSREG()
6706     if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeVSTRVLDR_SYSREG()
6709   if (!Check(S, DecodeT2AddrModeImm7s4(Inst, addr, Address, Decoder)))  in DecodeVSTRVLDR_SYSREG()
6712   Inst.addOperand(MCOperand::createImm(ARMCC::AL));  in DecodeVSTRVLDR_SYSREG()
6713   Inst.addOperand(MCOperand::createReg(0));  in DecodeVSTRVLDR_SYSREG()
6719 DecodeMVE_MEM_pre(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeMVE_MEM_pre()  argument
6728   if (!Check(S, RnDecoder(Inst, Rn, Address, Decoder)))  in DecodeMVE_MEM_pre()
6730   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVE_MEM_pre()
6732   if (!Check(S, AddrDecoder(Inst, addr, Address, Decoder)))  in DecodeMVE_MEM_pre()
6739 static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val,  in DecodeMVE_MEM_1_pre()  argument
6742   return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder,  in DecodeMVE_MEM_1_pre()
6749 static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val,  in DecodeMVE_MEM_2_pre()  argument
6752   return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder,  in DecodeMVE_MEM_2_pre()
6759 static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val,  in DecodeMVE_MEM_3_pre()  argument
6762   return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder,  in DecodeMVE_MEM_3_pre()
6769 static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val,  in DecodePowerTwoOperand()  argument
6777   Inst.addOperand(MCOperand::createImm(1LL << Val));  in DecodePowerTwoOperand()
6783 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address,  in DecodeMVEPairVectorIndexOperand()  argument
6787   Inst.addOperand(MCOperand::createImm(start + Val));  in DecodeMVEPairVectorIndexOperand()
6792 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,  in DecodeMVEVMOVQtoDReg()  argument
6802   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeMVEVMOVQtoDReg()
6804   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2, Address, Decoder)))  in DecodeMVEVMOVQtoDReg()
6806   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVEVMOVQtoDReg()
6808   if (!Check(S, DecodeMVEPairVectorIndexOperand<2>(Inst, index, Address, Decoder)))  in DecodeMVEVMOVQtoDReg()
6810   if (!Check(S, DecodeMVEPairVectorIndexOperand<0>(Inst, index, Address, Decoder)))  in DecodeMVEVMOVQtoDReg()
6816 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,  in DecodeMVEVMOVDRegtoQ()  argument
6826   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVEVMOVDRegtoQ()
6828   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVEVMOVDRegtoQ()
6830   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))  in DecodeMVEVMOVDRegtoQ()
6832   if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2, Address, Decoder)))  in DecodeMVEVMOVDRegtoQ()
6834   if (!Check(S, DecodeMVEPairVectorIndexOperand<2>(Inst, index, Address, Decoder)))  in DecodeMVEVMOVDRegtoQ()
6836   if (!Check(S, DecodeMVEPairVectorIndexOperand<0>(Inst, index, Address, Decoder)))  in DecodeMVEVMOVDRegtoQ()
6843 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeMVEOverlappingLongShift()  argument
6859     switch (Inst.getOpcode()) {  in DecodeMVEOverlappingLongShift()
6862         Inst.setOpcode(ARM::MVE_SQRSHR);  in DecodeMVEOverlappingLongShift()
6866         Inst.setOpcode(ARM::MVE_UQRSHL);  in DecodeMVEOverlappingLongShift()
6873     if (!Check(S, DecoderGPRRegisterClass(Inst, Rda, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6877     if (!Check(S, DecoderGPRRegisterClass(Inst, Rda, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6881     if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6897   if (!Check(S, DecodetGPREvenRegisterClass(Inst, RdaLo, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6899   if (!Check(S, DecodetGPROddRegisterClass(Inst, RdaHi, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6903   if (!Check(S, DecodetGPREvenRegisterClass(Inst, RdaLo, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6905   if (!Check(S, DecodetGPROddRegisterClass(Inst, RdaHi, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6909   if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeMVEOverlappingLongShift()
6912   if (Inst.getOpcode() == ARM::MVE_SQRSHRL ||  in DecodeMVEOverlappingLongShift()
6913       Inst.getOpcode() == ARM::MVE_UQRSHLL) {  in DecodeMVEOverlappingLongShift()
6916     Inst.addOperand(MCOperand::createImm(Saturate));  in DecodeMVEOverlappingLongShift()
6922 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,  in DecodeMVEVCVTt1fp()  argument
6932   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder)))  in DecodeMVEVCVTt1fp()
6934   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder)))  in DecodeMVEVCVTt1fp()
6936   if (!Check(S, DecodeVCVTImmOperand(Inst, imm6, Address, Decoder)))  in DecodeMVEVCVTt1fp()
6943 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeMVEVCMP()  argument
6946   Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeMVEVCMP()
6948   if (!Check(S, DecodeMQPRRegisterClass(Inst, Qn, Address, Decoder)))  in DecodeMVEVCMP()
6958     if (!Check(S, DecodeGPRwithZRRegisterClass(Inst, Rm, Address, Decoder)))  in DecodeMVEVCMP()
6966     if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder)))  in DecodeMVEVCMP()
6970   if (!Check(S, predicate_decoder(Inst, fc, Address, Decoder)))  in DecodeMVEVCMP()
6973   Inst.addOperand(MCOperand::createImm(ARMVCC::None));  in DecodeMVEVCMP()
6974   Inst.addOperand(MCOperand::createReg(0));  in DecodeMVEVCMP()
6975   Inst.addOperand(MCOperand::createImm(0));  in DecodeMVEVCMP()
6980 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,  in DecodeMveVCTP()  argument
6983   Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeMveVCTP()
6985   if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder)))  in DecodeMveVCTP()
6990 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,  in DecodeMVEVPNOT()  argument
6994   Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeMVEVPNOT()
6995   Inst.addOperand(MCOperand::createReg(ARM::VPR));  in DecodeMVEVPNOT()
6999 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,  in DecodeT2AddSubSPImm()  argument
7017               DecodeGPRspRegisterClass(Inst, Rd, Address, Decoder))) || // dst  in DecodeT2AddSubSPImm()
7018       (!Check(DS, DecodeGPRspRegisterClass(Inst, Rn, Address, Decoder))))  in DecodeT2AddSubSPImm()
7021     Inst.setOpcode(sign1 ? ARM::t2SUBspImm12 : ARM::t2ADDspImm12);  in DecodeT2AddSubSPImm()
7022     Inst.addOperand(MCOperand::createImm(Imm12)); // zext imm12  in DecodeT2AddSubSPImm()
7024     Inst.setOpcode(sign1 ? ARM::t2SUBspImm : ARM::t2ADDspImm);  in DecodeT2AddSubSPImm()
7025     if (!Check(DS, DecodeT2SOImm(Inst, Imm12, Address, Decoder))) // imm12  in DecodeT2AddSubSPImm()
7027     if (!Check(DS, DecodeCCOutOperand(Inst, S, Address, Decoder))) // cc_out  in DecodeT2AddSubSPImm()