Lines Matching refs:PostIdxReg
929 struct PostIdxRegOp PostIdxReg; member
1443 ARMMCRegisterClasses[ARM::GPRRegClassID].contains(PostIdxReg.RegNum); in isPostIdxRegShifted()
1446 return isPostIdxRegShifted() && PostIdxReg.ShiftTy == ARM_AM::no_shift; in isPostIdxReg()
3025 ARM_AM::getAM3Opc(PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub, 0); in addAM3OffsetOperands()
3026 Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum)); in addAM3OffsetOperands()
3291 Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum)); in addPostIdxRegOperands()
3292 Inst.addOperand(MCOperand::createImm(PostIdxReg.isAdd)); in addPostIdxRegOperands()
3297 Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum)); in addPostIdxRegShiftedOperands()
3300 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands()
3301 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm, in addPostIdxRegShiftedOperands()
3302 PostIdxReg.ShiftTy); in addPostIdxRegShiftedOperands()
3821 Op->PostIdxReg.RegNum = RegNum; in CreatePostIdxReg()
3822 Op->PostIdxReg.isAdd = isAdd; in CreatePostIdxReg()
3823 Op->PostIdxReg.ShiftTy = ShiftTy; in CreatePostIdxReg()
3824 Op->PostIdxReg.ShiftImm = ShiftImm; in CreatePostIdxReg()
3959 OS << "post-idx register " << (PostIdxReg.isAdd ? "" : "-") in print()
3960 << RegName(PostIdxReg.RegNum); in print()
3961 if (PostIdxReg.ShiftTy != ARM_AM::no_shift) in print()
3962 OS << ARM_AM::getShiftOpcStr(PostIdxReg.ShiftTy) << " " in print()
3963 << PostIdxReg.ShiftImm; in print()