928     struct MemoryOp Memory;  member
1121       if(!Memory.OffsetImm || Memory.OffsetRegNum) return false;  in isThumbMemPC()
1122       if(Memory.BaseRegNum != ARM::PC) return false;  in isThumbMemPC()
1123       if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in isThumbMemPC()
1359     if (Memory.BaseRegNum &&  in isMVEMem()
1360         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum) &&  in isMVEMem()
1361         !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Memory.BaseRegNum))  in isMVEMem()
1363     if (Memory.OffsetRegNum &&  in isMVEMem()
1365             Memory.OffsetRegNum))  in isMVEMem()
1372     if (Memory.BaseRegNum &&  in isGPRMem()
1373         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum))  in isGPRMem()
1375     if (Memory.OffsetRegNum &&  in isGPRMem()
1376         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.OffsetRegNum))  in isGPRMem()
1452     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffset()
1453      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffset()
1460             Memory.BaseRegNum))  in isMemNoOffsetT2()
1464     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT2()
1465      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT2()
1472             Memory.BaseRegNum))  in isMemNoOffsetT2NoSp()
1476     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT2NoSp()
1477      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT2NoSp()
1484             Memory.BaseRegNum))  in isMemNoOffsetT()
1488     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT()
1489      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT()
1492     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemPCRelImm12()
1495     if (Memory.BaseRegNum != ARM::PC)  in isMemPCRelImm12()
1498     if (!Memory.OffsetImm) return true;  in isMemPCRelImm12()
1499     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemPCRelImm12()
1582     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode2()
1584     if (Memory.OffsetRegNum) return true;  in isAddrMode2()
1586     if (!Memory.OffsetImm) return true;  in isAddrMode2()
1587     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode2()
1610     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode3()
1612     if (Memory.ShiftType != ARM_AM::no_shift) return false;  in isAddrMode3()
1614     if (Memory.OffsetRegNum) return true;  in isAddrMode3()
1616     if (!Memory.OffsetImm) return true;  in isAddrMode3()
1617     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode3()
1647     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode5()
1649     if (Memory.OffsetRegNum) return false;  in isAddrMode5()
1651     if (!Memory.OffsetImm) return true;  in isAddrMode5()
1652     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode5()
1666     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode5FP16()
1668     if (Memory.OffsetRegNum) return false;  in isAddrMode5FP16()
1670     if (!Memory.OffsetImm) return true;  in isAddrMode5FP16()
1671     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode5FP16()
1680     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemTBB()
1681         Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0)  in isMemTBB()
1687     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemTBH()
1688         Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 ||  in isMemTBH()
1689         Memory.Alignment != 0 )  in isMemTBH()
1695     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.Alignment != 0)  in isMemRegOffset()
1701     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isT2MemRegOffset()
1702         Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC)  in isT2MemRegOffset()
1705     if (Memory.ShiftType == ARM_AM::no_shift)  in isT2MemRegOffset()
1707     if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3)  in isT2MemRegOffset()
1715     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemThumbRR()
1716         Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0)  in isMemThumbRR()
1718     return isARMLowRegister(Memory.BaseRegNum) &&  in isMemThumbRR()
1719       (!Memory.OffsetRegNum || isARMLowRegister(Memory.OffsetRegNum));  in isMemThumbRR()
1723     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs4()
1724         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs4()
1727     if (!Memory.OffsetImm) return true;  in isMemThumbRIs4()
1728     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs4()
1736     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs2()
1737         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs2()
1740     if (!Memory.OffsetImm) return true;  in isMemThumbRIs2()
1741     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs2()
1749     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs1()
1750         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs1()
1753     if (!Memory.OffsetImm) return true;  in isMemThumbRIs1()
1754     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs1()
1762     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbSPI()
1763         Memory.BaseRegNum != ARM::SP || Memory.Alignment != 0)  in isMemThumbSPI()
1766     if (!Memory.OffsetImm) return true;  in isMemThumbSPI()
1767     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbSPI()
1780     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm8s4Offset()
1783     if (!Memory.OffsetImm) return true;  in isMemImm8s4Offset()
1784     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm8s4Offset()
1799     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0 ||  in isMemImm7s4Offset()
1801             Memory.BaseRegNum))  in isMemImm7s4Offset()
1804     if (!Memory.OffsetImm) return true;  in isMemImm7s4Offset()
1805     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm7s4Offset()
1814     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm0_1020s4Offset()
1817     if (!Memory.OffsetImm) return true;  in isMemImm0_1020s4Offset()
1818     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm0_1020s4Offset()
1826     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm8Offset()
1829     if (Memory.BaseRegNum == ARM::PC) return false;  in isMemImm8Offset()
1831     if (!Memory.OffsetImm) return true;  in isMemImm8Offset()
1832     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm8Offset()
1842     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0 ||  in isMemImm7ShiftedOffset()
1843         !ARMMCRegisterClasses[RegClassID].contains(Memory.BaseRegNum))  in isMemImm7ShiftedOffset()
1849     if (!Memory.OffsetImm) return true;  in isMemImm7ShiftedOffset()
1850     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm7ShiftedOffset()
1872     if (!isMVEMem() || Memory.OffsetImm != nullptr || Memory.Alignment != 0)  in isMemRegRQOffset()
1876             Memory.BaseRegNum))  in isMemRegRQOffset()
1879             Memory.OffsetRegNum))  in isMemRegRQOffset()
1882     if (shift == 0 && Memory.ShiftType != ARM_AM::no_shift)  in isMemRegRQOffset()
1886         (Memory.ShiftType != ARM_AM::uxtw || Memory.ShiftImm != shift))  in isMemRegRQOffset()
1893     if (!isMVEMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemRegQOffset()
1897             Memory.BaseRegNum))  in isMemRegQOffset()
1900     if (!Memory.OffsetImm)  in isMemRegQOffset()
1904     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemRegQOffset()
1921     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemPosImm8Offset()
1924     if (!Memory.OffsetImm) return true;  in isMemPosImm8Offset()
1925     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemPosImm8Offset()
1933     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemNegImm8Offset()
1936     if (Memory.BaseRegNum == ARM::PC) return false;  in isMemNegImm8Offset()
1938     if (!Memory.OffsetImm) return false;  in isMemNegImm8Offset()
1939     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemNegImm8Offset()
1948     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemUImm12Offset()
1951     if (!Memory.OffsetImm) return true;  in isMemUImm12Offset()
1952     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemUImm12Offset()
1967     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm12Offset()
1970     if (!Memory.OffsetImm) return true;  in isMemImm12Offset()
1971     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm12Offset()
2824     assert(isa<MCConstantExpr>(Memory.OffsetImm) && "Unknown value type!");  in addThumbMemPCOperands()
2825     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addThumbMemPCOperands()
2828       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addThumbMemPCOperands()
2848     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetOperands()
2853     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetT2Operands()
2858     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetT2NoSpOperands()
2863     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetTOperands()
2868     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemPCRelImm12Operands()
2871       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemPCRelImm12Operands()
2892     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAlignedMemoryOperands()
2893     Inst.addOperand(MCOperand::createImm(Memory.Alignment));  in addAlignedMemoryOperands()
2942     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode2Operands()
2943     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addAddrMode2Operands()
2944     if (!Memory.OffsetRegNum) {  in addAddrMode2Operands()
2945       if (!Memory.OffsetImm)  in addAddrMode2Operands()
2947       else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode2Operands()
2958         Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode2Operands()
2963           ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add,  in addAddrMode2Operands()
2964                             Memory.ShiftImm, Memory.ShiftType);  in addAddrMode2Operands()
2995     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode3Operands()
2996     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addAddrMode3Operands()
2997     if (!Memory.OffsetRegNum) {  in addAddrMode3Operands()
2998       if (!Memory.OffsetImm)  in addAddrMode3Operands()
3000       else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode3Operands()
3011         Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode3Operands()
3016           ARM_AM::getAM3Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 0);  in addAddrMode3Operands()
3054     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode5Operands()
3055     if (!Memory.OffsetImm)  in addAddrMode5Operands()
3057     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode5Operands()
3069       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode5Operands()
3083     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode5FP16Operands()
3085     if (!Memory.OffsetImm)  in addAddrMode5FP16Operands()
3087     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode5FP16Operands()
3098       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode5FP16Operands()
3112     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm8s4OffsetOperands()
3113     addExpr(Inst, Memory.OffsetImm);  in addMemImm8s4OffsetOperands()
3127     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm7s4OffsetOperands()
3128     addExpr(Inst, Memory.OffsetImm);  in addMemImm7s4OffsetOperands()
3133     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm0_1020s4OffsetOperands()
3134     if (!Memory.OffsetImm)  in addMemImm0_1020s4OffsetOperands()
3136     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemImm0_1020s4OffsetOperands()
3140       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemImm0_1020s4OffsetOperands()
3145     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImmOffsetOperands()
3146     addExpr(Inst, Memory.OffsetImm);  in addMemImmOffsetOperands()
3151     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemRegRQOffsetOperands()
3152     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemRegRQOffsetOperands()
3165     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemUImm12OffsetOperands()
3166     addExpr(Inst, Memory.OffsetImm);  in addMemUImm12OffsetOperands()
3179     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm12OffsetOperands()
3180     addExpr(Inst, Memory.OffsetImm);  in addMemImm12OffsetOperands()
3192     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemTBBOperands()
3193     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemTBBOperands()
3198     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemTBHOperands()
3199     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemTBHOperands()
3205       ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add,  in addMemRegOffsetOperands()
3206                         Memory.ShiftImm, Memory.ShiftType);  in addMemRegOffsetOperands()
3207     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemRegOffsetOperands()
3208     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemRegOffsetOperands()
3214     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addT2MemRegOffsetOperands()
3215     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addT2MemRegOffsetOperands()
3216     Inst.addOperand(MCOperand::createImm(Memory.ShiftImm));  in addT2MemRegOffsetOperands()
3221     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRROperands()
3222     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemThumbRROperands()
3227     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs4Operands()
3228     if (!Memory.OffsetImm)  in addMemThumbRIs4Operands()
3230     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbRIs4Operands()
3234       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbRIs4Operands()
3239     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs2Operands()
3240     if (!Memory.OffsetImm)  in addMemThumbRIs2Operands()
3242     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbRIs2Operands()
3245       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbRIs2Operands()
3250     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs1Operands()
3251     addExpr(Inst, Memory.OffsetImm);  in addMemThumbRIs1Operands()
3256     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbSPIOperands()
3257     if (!Memory.OffsetImm)  in addMemThumbSPIOperands()
3259     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbSPIOperands()
3263       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbSPIOperands()
3804     Op->Memory.BaseRegNum = BaseRegNum;  in CreateMem()
3805     Op->Memory.OffsetImm = OffsetImm;  in CreateMem()
3806     Op->Memory.OffsetRegNum = OffsetRegNum;  in CreateMem()
3807     Op->Memory.ShiftType = ShiftType;  in CreateMem()
3808     Op->Memory.ShiftImm = ShiftImm;  in CreateMem()
3809     Op->Memory.Alignment = Alignment;  in CreateMem()
3810     Op->Memory.isNegative = isNegative;  in CreateMem()
3943     if (Memory.BaseRegNum)  in print()
3944       OS << " base:" << RegName(Memory.BaseRegNum);  in print()
3945     if (Memory.OffsetImm)  in print()
3946       OS << " offset-imm:" << *Memory.OffsetImm;  in print()
3947     if (Memory.OffsetRegNum)  in print()
3948       OS << " offset-reg:" << (Memory.isNegative ? "-" : "")  in print()
3949          << RegName(Memory.OffsetRegNum);  in print()
3950     if (Memory.ShiftType != ARM_AM::no_shift) {  in print()
3951       OS << " shift-type:" << ARM_AM::getShiftOpcStr(Memory.ShiftType);  in print()
3952       OS << " shift-imm:" << Memory.ShiftImm;  in print()
3954     if (Memory.Alignment)  in print()
3955       OS << " alignment:" << Memory.Alignment;  in print()