292   } ITState;  member in __anon2f82d7160111::ARMAsmParser
305     ITInst.addOperand(MCOperand::createImm(ITState.Cond));  in flushPendingInstructions()
306     ITInst.addOperand(MCOperand::createImm(ITState.Mask));  in flushPendingInstructions()
317     ITState.Mask = 0;  in flushPendingInstructions()
318     ITState.CurPosition = ~0U;  in flushPendingInstructions()
321   bool inITBlock() { return ITState.CurPosition != ~0U; }  in inITBlock()
322   bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; }  in inExplicitITBlock()
323   bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; }  in inImplicitITBlock()
326     return ITState.CurPosition == 4 - (unsigned)llvm::countr_zero(ITState.Mask);  in lastInITBlock()
334     unsigned TZ = llvm::countr_zero(ITState.Mask);  in forwardITPosition()
335     if (++ITState.CurPosition == 5 - TZ && ITState.IsExplicit)  in forwardITPosition()
336       ITState.CurPosition = ~0U; // Done with the IT block after this.  in forwardITPosition()
342     assert(ITState.CurPosition > 1);  in rewindImplicitITPosition()
343     ITState.CurPosition--;  in rewindImplicitITPosition()
344     unsigned TZ = llvm::countr_zero(ITState.Mask);  in rewindImplicitITPosition()
346     NewMask |= ITState.Mask & (0xC << TZ);  in rewindImplicitITPosition()
348     ITState.Mask = NewMask;  in rewindImplicitITPosition()
355     assert(ITState.CurPosition == 1);  in discardImplicitITBlock()
356     ITState.CurPosition = ~0U;  in discardImplicitITBlock()
366     unsigned MaskBit = extractITMaskBit(ITState.Mask, ITState.CurPosition);  in currentITCond()
367     return MaskBit ? ARMCC::getOppositeCondition(ITState.Cond) : ITState.Cond;  in currentITCond()
373     if (ITState.CurPosition == 1) {  in invertCurrentITCondition()
374       ITState.Cond = ARMCC::getOppositeCondition(ITState.Cond);  in invertCurrentITCondition()
376       ITState.Mask ^= 1 << (5 - ITState.CurPosition);  in invertCurrentITCondition()
382     return inITBlock() && (ITState.Mask & 1);  in isITBlockFull()
390     assert(Cond == ITState.Cond ||  in extendImplicitITBlock()
391            Cond == ARMCC::getOppositeCondition(ITState.Cond));  in extendImplicitITBlock()
392     unsigned TZ = llvm::countr_zero(ITState.Mask);  in extendImplicitITBlock()
395     NewMask |= ITState.Mask & (0xE << TZ);  in extendImplicitITBlock()
397     NewMask |= (Cond != ITState.Cond) << TZ;  in extendImplicitITBlock()
400     ITState.Mask = NewMask;  in extendImplicitITBlock()
406     ITState.Cond = ARMCC::AL;  in startImplicitITBlock()
407     ITState.Mask = 8;  in startImplicitITBlock()
408     ITState.CurPosition = 1;  in startImplicitITBlock()
409     ITState.IsExplicit = false;  in startImplicitITBlock()
418     ITState.Cond = Cond;  in startExplicitITBlock()
419     ITState.Mask = Mask;  in startExplicitITBlock()
420     ITState.CurPosition = 0;  in startExplicitITBlock()
421     ITState.IsExplicit = true;  in startExplicitITBlock()
699     ITState.CurPosition = ~0U;  in ARMAsmParser()
11052     extendImplicitITBlock(ITState.Cond);  in MatchInstruction()
11110       ITState.Cond =  in MatchInstruction()