Lines Matching refs:CodeGenOptLevel

224                                            CodeGenOptLevel OL, bool isLittle)  in ARMBaseTargetMachine()
332                                        CodeGenOptLevel OL, bool JIT)  in ARMLETargetMachine()
340                                        CodeGenOptLevel OL, bool JIT)  in ARMBETargetMachine()
426   if (TM->getOptLevel() != CodeGenOptLevel::None && EnableAtomicTidy)  in addIRPasses()
440   if (getOptLevel() == CodeGenOptLevel::Aggressive)  in addIRPasses()
444   if (TM->getOptLevel() >= CodeGenOptLevel::Default)  in addIRPasses()
448   if (TM->getOptLevel() != CodeGenOptLevel::None)  in addIRPasses()
460   if (getOptLevel() != CodeGenOptLevel::None)  in addCodeGenPrepare()
466   if ((TM->getOptLevel() != CodeGenOptLevel::None &&  in addPreISel()
475         (TM->getOptLevel() < CodeGenOptLevel::Aggressive) &&  in addPreISel()
486   if (TM->getOptLevel() != CodeGenOptLevel::None) {  in addPreISel()
528   if (getOptLevel() != CodeGenOptLevel::None) {  in addPreRegAlloc()
529     if (getOptLevel() == CodeGenOptLevel::Aggressive)  in addPreRegAlloc()
545   if (getOptLevel() != CodeGenOptLevel::None) {  in addPreSched2()
557   if (getOptLevel() != CodeGenOptLevel::None) {  in addPreSched2()
574   if (getOptLevel() != CodeGenOptLevel::None) {  in addPreSched2()
593   if (getOptLevel() != CodeGenOptLevel::None) {  in addPreEmitPass()