Lines Matching refs:ARM
30 namespace ARM { namespace
142 const RegisterBank &RBGPR = getRegBank(ARM::GPRRegBankID); in ARMRegisterBankInfo()
144 assert(&ARM::GPRRegBank == &RBGPR && "The order in RegBanks is messed up"); in ARMRegisterBankInfo()
147 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRRegClassID)) && in ARMRegisterBankInfo()
149 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRwithAPSRRegClassID)) && in ARMRegisterBankInfo()
151 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnopcRegClassID)) && in ARMRegisterBankInfo()
153 assert(RBGPR.covers(*TRI.getRegClass(ARM::rGPRRegClassID)) && in ARMRegisterBankInfo()
155 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPRRegClassID)) && in ARMRegisterBankInfo()
157 assert(RBGPR.covers(*TRI.getRegClass(ARM::tcGPRRegClassID)) && in ARMRegisterBankInfo()
159 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnoip_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
162 ARM::tGPREven_and_GPRnoip_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
164 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPROdd_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
170 ARM::checkPartialMappings(); in ARMRegisterBankInfo()
171 ARM::checkValueMappings(); in ARMRegisterBankInfo()
181 using namespace ARM; in getRegBankFromRegClass()
201 return getRegBank(ARM::GPRRegBankID); in getRegBankFromRegClass()
208 return getRegBank(ARM::FPRRegBankID); in getRegBankFromRegClass()
233 const ValueMapping *OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
242 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
243 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
264 OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
278 ? &ARM::ValueMappings[ARM::GPR3OpsIdx] in getInstrMapping()
279 : getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
280 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
288 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
289 &ARM::ValueMappings[ARM::GPR3OpsIdx]}) in getInstrMapping()
290 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
300 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
301 : &ARM::ValueMappings[ARM::SPR3OpsIdx]; in getInstrMapping()
308 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
309 &ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
310 &ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
311 &ARM::ValueMappings[ARM::DPR3OpsIdx]}) in getInstrMapping()
312 : getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
313 &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
314 &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
315 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
323 getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
324 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
332 getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
333 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
344 ? getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
345 &ARM::ValueMappings[ARM::DPR3OpsIdx]}) in getInstrMapping()
346 : getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
347 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
358 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
359 &ARM::ValueMappings[ARM::GPR3OpsIdx]}) in getInstrMapping()
360 : getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
361 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
367 {Ty.getSizeInBits() == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
368 : &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
376 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
386 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
387 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
388 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
389 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
397 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr, in getInstrMapping()
398 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
399 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
415 auto FPRValueMapping = Size == 32 ? &ARM::ValueMappings[ARM::SPR3OpsIdx] in getInstrMapping()
416 : &ARM::ValueMappings[ARM::DPR3OpsIdx]; in getInstrMapping()
418 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr, in getInstrMapping()
432 getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
433 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
434 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
447 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
448 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
449 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
457 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
466 OperandBanks[0] = Size == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
467 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
480 (Mapping.RegBank->getID() != ARM::FPRRegBankID || in getInstrMapping()