3145   MachineInstr *BaseAccess = nullptr;  in DistributeIncrements()  local
3168       BaseAccess = &Use;  in DistributeIncrements()
3175   if (BaseAccess && Increment) {  in DistributeIncrements()
3176     if (PrePostInc || BaseAccess->getParent() != Increment->getParent())  in DistributeIncrements()
3190       if (&Use == BaseAccess || (Use.getOpcode() != TargetOpcode::PHI &&  in DistributeIncrements()
3191                                  !DT->dominates(BaseAccess, &Use))) {  in DistributeIncrements()
3200         BaseAccess->getOpcode(), IncrementOffset > 0 ? ARM_AM::add : ARM_AM::sub);  in DistributeIncrements()
3218     BaseAccess = PrePostInc;  in DistributeIncrements()
3235     if (DT->dominates(BaseAccess, Use)) {  in DistributeIncrements()
3245     } else if (!DT->dominates(Use, BaseAccess)) {  in DistributeIncrements()
3258     LLVM_DEBUG(dbgs() << "Changing: "; BaseAccess->dump());  in DistributeIncrements()
3262         createPostIncLoadStore(BaseAccess, IncrementOffset, NewBaseReg, TII, TRI);  in DistributeIncrements()
3263     BaseAccess->eraseFromParent();  in DistributeIncrements()