Lines Matching refs:VecVT

6219   EVT VecVT = EVT::getVectorVT(  in CombineVMOVDRRCandidateWithVecOp()  local
6222 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
8082 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR() local
8083 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR()
8139 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerBUILD_VECTOR() local
8143 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
8992 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerVECTOR_SHUFFLE() local
8993 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8994 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
9005 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
9026 EVT VecVT = Op.getOperand(0).getValueType(); in LowerINSERT_VECTOR_ELT_i1() local
9036 getVectorTyFromPredicateVector(VecVT).getScalarSizeInBits() / 8; in LowerINSERT_VECTOR_ELT_i1()
9073 EVT VecVT = VecIn.getValueType(); in LowerINSERT_VECTOR_ELT() local
9075 VecVT.getVectorNumElements()); in LowerINSERT_VECTOR_ELT()
9081 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
9089 EVT VecVT = Op.getOperand(0).getValueType(); in LowerEXTRACT_VECTOR_ELT_i1() local
9099 getVectorTyFromPredicateVector(VecVT).getScalarSizeInBits() / 8; in LowerEXTRACT_VECTOR_ELT_i1()
13363 EVT VecVT = Ext0.getOperand(0).getValueType(); in PerformVQDMULHCombine() local
13364 if (!VecVT.isPow2VectorType() || VecVT.getVectorNumElements() == 1) in PerformVQDMULHCombine()
13366 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
13367 VecVT.getScalarType() != ScalarType || in PerformVQDMULHCombine()
13376 if (VecVT.getSizeInBits() < 128) { in PerformVQDMULHCombine()
13378 MVT::getVectorVT(MVT::getIntegerVT(128 / VecVT.getVectorNumElements()), in PerformVQDMULHCombine()
13379 VecVT.getVectorNumElements()); in PerformVQDMULHCombine()
13388 Trunc = DAG.getNode(ISD::TRUNCATE, DL, VecVT, Trunc); in PerformVQDMULHCombine()
13393 assert(VecVT.getSizeInBits() % 128 == 0 && "Expected a power2 type"); in PerformVQDMULHCombine()
13394 unsigned NumParts = VecVT.getSizeInBits() / 128; in PerformVQDMULHCombine()
13407 DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Parts)); in PerformVQDMULHCombine()
15345 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts); in PerformARMBUILD_VECTORCombine() local
15348 if (!TLI.isTypeLegal(VecVT)) in PerformARMBUILD_VECTORCombine()
15356 SDValue Vec = DAG.getUNDEF(VecVT); in PerformARMBUILD_VECTORCombine()
15372 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
15522 EVT VecVT = Op0.getValueType(); in PerformExtractEltToVMOVRRD() local
15525 if (VecVT.getVectorNumElements() != 4) in PerformExtractEltToVMOVRRD()
15641 EVT VecVT = Vec.getValueType(); in PerformInsertSubvectorCombine() local
15645 if (!VecVT.isFixedLengthVector() || in PerformInsertSubvectorCombine()
15646 !DCI.DAG.getTargetLoweringInfo().isTypeLegal(VecVT) || in PerformInsertSubvectorCombine()
15656 if ((SubVT.getSizeInBits() * 2) != VecVT.getSizeInBits() || in PerformInsertSubvectorCombine()
15674 return DCI.DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Lo, Hi); in PerformInsertSubvectorCombine()
20117 EVT VecVT = SrcSV.getValueType(); in computeKnownBitsForTargetNode() local
20118 assert(VecVT.isVector() && "VGETLANE expected a vector type"); in computeKnownBitsForTargetNode()
20119 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in computeKnownBitsForTargetNode()
20129 const unsigned SrcSz = VecVT.getVectorElementType().getSizeInBits(); in computeKnownBitsForTargetNode()