Lines Matching refs:SINT_TO_FP

174     setOperationAction(ISD::SINT_TO_FP, VT, Custom);  in addTypeForNEON()
179 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addTypeForNEON()
305 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addMVEVectorTypes()
458 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addMVEVectorTypes()
469 setOperationAction(ISD::SINT_TO_FP, MVT::v2i1, Expand); in addMVEVectorTypes()
945 setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering()
946 setOperationAction(ISD::SINT_TO_FP, MVT::v8i16, Custom); in ARMTargetLowering()
1071 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering()
5986 case ISD::SINT_TO_FP: in LowerVectorINT_TO_FP()
5988 Opc = ISD::SINT_TO_FP; in LowerVectorINT_TO_FP()
6006 if (Op.getOpcode() == ISD::SINT_TO_FP) in LowerINT_TO_FP()
9693 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9694 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
9725 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9726 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
9833 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
9834 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
10567 case ISD::SINT_TO_FP: in LowerOperation()
15517 (Ext->use_begin()->getOpcode() == ISD::SINT_TO_FP || in PerformExtractEltToVMOVRRD()
17030 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
17057 bool isSigned = OpOpcode == ISD::SINT_TO_FP; in PerformVDIVCombine()