Lines Matching refs:RegsToPass
2312 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
2321 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); in PassF64ArgInRegs()
2324 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); in PassF64ArgInRegs()
2474 RegsToPassVector RegsToPass; in LowerCall() local
2545 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2550 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2561 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2575 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2600 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
2646 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
2647 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
2648 RegsToPass[i].second, InGlue); in LowerCall()
2835 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
2836 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
2837 RegsToPass[i].second.getValueType())); in LowerCall()