187   setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Legal);  in addTypeForNEON()
444     setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);  in addMVEVectorTypes()
6223   return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast,  in CombineVMOVDRRCandidateWithVecOp()
8283           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
8289           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
8294           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
8297           DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,  in ReconstructShuffle()
9769     N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerSDIV()
9771     N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerSDIV()
9773     N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerSDIV()
9775     N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerSDIV()
9806     N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerUDIV()
9808     N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerUDIV()
9810     N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0,  in LowerUDIV()
9812     N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1,  in LowerUDIV()
10144     Pred = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MemVT, Pred,  in LowerPredicateLoad()
10601   case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG, Subtarget);  in LowerOperation()
13398         DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0),  in PerformVQDMULHCombine()
13401         DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext1.getOperand(0),  in PerformVQDMULHCombine()
15667     Hi = DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec,  in PerformInsertSubvectorCombine()
15670     Lo = DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec,  in PerformInsertSubvectorCombine()
16698         DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewFromVT, Trunc.getOperand(0),  in PerformSplittingToNarrowingStores()
21234   if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))  in isExtractSubvectorCheap()